Analog Devices dBCool ADT7476, Руководство пользователя

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ADT7476
Rev. B | Page 63 of 72
Table 38. Register 0x62—Enhanced Acoustics Register 1 (Power-On Default = 0x00)
Bit Name R/W
1
Description
[2:0] ACOU
2
R/W Assuming that PWMx is associated with the Remote 1 temperature channel, these bits define the maximum
rate of change of the PWMx output for Remote 1 temperature-related changes. Instead of the fan speed
jumping instantaneously to its newly determined speed, it ramps gradually at the rate determined by these
bits. This feature ultimately enhances the acoustics of the fan.
When Bit 7 of Configuration Register 6 (0x10) is 0
Time Slot Increase Time for 0% to 100%
000 = 1 37.5 sec
001 = 2 18.8 sec
010 = 3 12.5 sec
011 = 4 7.5 sec
100 = 8 4.7 sec
101 = 12 3.1 sec
110 = 24 1.6 sec
111 = 48 0.8 sec
When Bit 7 of Configuration Register 6 (0x10) is 1
Time Slot Increase Time for 0% to 100%
000 = 1 52.2 sec
001 = 2 26.1 sec
010 = 3 17.4 sec
011 = 4 10.4 sec
100 = 8 6.5 sec
101 = 12 4.4 sec
110 = 24 2.2 sec
111 = 48 1.1 sec
[3] EN1 R/W When this bit is 1, smoothing is enabled on Remote 1 temperature channel.
[4] SYNC R/W SYNC = 1 synchronizes fan speed measurements on TACH2, TACH3, and TACH4 to PWM3. This allows up to
three fans to be driven from PWM3 output and their speeds to be measured.
SYNC = 0 synchronizes only TACH3 and TACH4 to PWM3 output.
[5] MIN1 R/W When the ADT7476 is in automatic fan control mode, this bit defines whether PWM1 is off (0% duty cycle)
or at PWM1 minimum duty cycle when the controlling temperature is below its T
MIN
– hysteresis value.
0 = 0% duty cycle below T
MIN
– hysteresis.
1 = PWM1 minimum duty cycle below T
MIN
– hysteresis.
[6] MIN2 R/W When the ADT7476 is in automatic fan speed control mode, this bit defines whether PWM2 is off (0% duty
cycle) or at PWM2 minimum duty cycle when the controlling temperature is below its T
MIN
– hysteresis
value.
0 = 0% duty cycle below T
MIN
– hysteresis.
1 = PWM2 minimum duty cycle below T
MIN
– hysteresis.
[7] MIN3 R/W When the ADT7476 is in automatic fan speed control mode, this bit defines whether PWM3 is off (0% duty
cycle) or at PWM3 minimum duty cycle when the controlling temperature is below its T
MIN
– hysteresis
value.
0 = 0% duty cycle below T
MIN
– hysteresis.
1 = PWM3 minimum duty cycle below T
MIN
– hysteresis.
1 This register becomes read-only when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this register fail.
2
Setting the relevant bit of Configuration Register 6 (0x10, Bits [2:0]) further decreases these ramp rates by a factor of 4.
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