Analog Devices dBCool ADT7476, Руководство пользователя

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ADT7476
Rev. B | Page 56 of 72
Address R/W Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default Lockable
0x7D R/W Configuration
Register 4 BpAtt
12 V BpAtt
5 V BpAtt V
CCP
BpAtt
2.5 V
Max/Speed
on THERM THERM
Disable Pin14Func Pin14Func 0x00 Yes
0x7E R Test 1 Do not write to these registers 0x00 Yes
0x7F R Test 2 Do not write to these registers 0x00 Yes
Table 19. Register 0x10—Configuration Register 6 (Power-On Default = 0x00)
1 , 2
Bit Name R/W Description
[0]
SlowFan
Remote 1
R/W
When this bit is set, Fan 1 smoothing times are multiplied ×4 for Remote 1 temperature channel (as defined
in Register 0x62).
[1] SlowFan Local R/W When this bit is set, Fan 2 smoothing times are multiplied ×4 for local temperature channel (as defined in
Register 0x63).
[2] SlowFan
Remote 2 R/W When this bit is set, Fan 3 smoothing times are multiplied ×4 for Remote 2 temperature channel (as defined
in Register 0x63).
[3] THERM in
Manual
R/W When this bit is set, THERM is enabled in manual mode.
1
[4] SlaveEn R/W Setting this bit configures the ADT7476 as a slave for use in fan sync mode.
[5] MasterEn R/W Setting this bit configures the ADT7476 as a master for use in fan sync mode.
[6] V
CCP
Low R/W V
CCP
Low = 1. When the power is supplied from 3.3 V STANDBY and the core voltage (V
CCP
) drops below its
V
CCP
Low limit value (Register 0x46), the following occurs:
Status Bit 1 in Status Register 1 is set.
SMBALERT is generated, if enabled.
PROCHOT monitoring is disabled.
Everything is re-enabled once V
CCP
increases above the V
CCP
low limit.
When V
CCP
increases above the low limit:
PROCHOT monitoring is enabled.
Fans return to their programmed state after a spin-up cycle.
[7] ExtraSlow R/W When this bit is set, all fan smoothing times are increased by an additional 39.2%
1 A THERM event always overrides any fan setting (even when fans are disabled).
2 This register becomes read-only when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this register fail.
Table 20. Register 0x11—Configuration Register 7 (Power-On Default = 0x00)
1
Bit Name R/W Description
[0] DisTHERMHys R/W Setting this bit to 1 disables THERM hysteresis.
[7:1] Reserved N/A Reserved. Do not write to these bits.
1
This register becomes read-only when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this register fail.
Table 21. Voltage Reading Registers (Power-On Default = 0x00)
1
Register Address R/W Description
0x20 Read-only Reflects the voltage measurement at the 2.5 V input on Pin 22 (8 MSBs of reading).
0x21 Read-only Reflects the voltage measurement at the V
CCP
input on Pin 23 (8 MSBs of reading). 2
0x22 Read-only Reflects the voltage measurement at the V
CC
input on Pin 4 (8 MSBs of reading). 3
0x23 Read-only Reflects the voltage measurement at the 5 V input on Pin 20 (8 MSBs of reading).
0x24 Read-only Reflects the voltage measurement at the 12 V input on Pin 21 (8 MSBs of reading).
1 If the extended resolution bits of these readings are also being read, the extended resolution registers (0x76, 0x77) must be read first. Once the extended resolution
registers have been read, the associated MSB reading registers are frozen until read. Both the extended resolution registers and the MSB registers are frozen.
2
If V
CCP
Low (Bit 7 of Register 0x40) is set, V
CCP
can control the sleep state of the ADT7476.
3
V
CC
(Pin 4) is the supply voltage for the ADT7476.
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