ADV8003 Hardware Manual
Rev. B, August 2013
209
ADV8002
OSD
Video Input 1
DDR2
Memory
Microcontroller
SPI Flash
SPI
Slave
SPI
Master
ADV8003
OSD
Blended Output 1
DDR2
Memory
Microcontroller
SPI Flash
SPI
Slave
SPI
Master
Video Input 1
Video Input 2
Video Input 2
Blended Output 1
Blended Output 2
Blended Output 2
Blend
Input 1
Blend
Input 2
Blend
Output 1
Blend
Output 2
Figure 72: Typical Application Diagram
4.1.3.
Typical OSD Component Sizes
An indication of typical OSD component sizes in provided in Table 36. This can be used to gain an approximation of the size of an OSD.
Table 36: Output Port Configuration Settings for Example Output Formats
Component
Color Mode
(per pixel)
DDR2 Size
(bytes, W – width, H – height)
Label
8 bits
W*H*2
Image
8 bits/16 bits/32 bits
W*H*2/4/8
Listbox
32 bits
W*H*8
Textbox
16 bits
W*H*4
Iptextbox
16 bits
W*H*4
Histogram
32 bits
W*H*8
Menubar
32 bits
W*H*8
Keyboard
32 bits
W*H*8
Progressbar
32 bits
W*H*8
Timer
0
0
4.2.
ARCHITECTURE OVERVIEW
4.2.1.
Introduction
As outlined in
4.1.2, the OSD core in the ADV8003 is controlled mainly via a SPI slave interface and loads images and OSD data
into the part via a SPI master interface. Consequently, a number of the configuration registers for the OSD core are SPI registers and the
code required to control these registers is automatically generated by the
Blimp OSD
software tool – abstracting the user away from having
to understand them. For this reason, many of the SPI registers are not described in this section. For more information, refer to the
Blimp
OSD
software tool user manual.
4.2.2.
Top Level Diagram
provides a diagram of the ADV8003 OSD top level.
Содержание ADV8003
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