![background image](http://html.mh-extra.com/html/analog-devices/adsp-21261-sharc/adsp-21261-sharc_hardware-reference-manual_2939675507.webp)
ADSP-2126x SHARC Processor Hardware Reference
11-17
Input Data Port
•
IDP_Pxx_PDAPMASK
bits in the
IDP_PDAP_CTL
register to spec-
ify the input mask, if the PDAP is used.
•
IDP_PORT_SELECT
bits in the
IDP_PDAP_CTL
register to spec-
ify input from the DAI pins or the Parallel Port pins, if the
PDAP is used.
•
IDP_PDAP_CLKEDGE
bit (bit 29) in the
IDP_PDAP_CTL
register
to specify if data is latched on the rising or falling clock
edge, if the PDAP is used.
3. Keep the clock and frame sync inputs of all serial inputs and/or
PDAP connected to
LOW
. Use the
SRU_CLK1
,
SRU_CLK2
,
SRU_FS1
,
and
SRU_FS2
registers to specify these inputs.
4. Connect all of the inputs to the IDP by writing to the
SRU_DAT3
,
SRU_DAT4
,
SRU_FS1
,
SRU_FS2
,
SRU_CLK1
and
SRU_CLK2
registers.
Connect the clock and frame sync of any unused ports to
LOW
.
5. Set the desired value for
N_SET
variable (the
IDP_NSET
bits, 3–0,
in the
IDP_CTL
register).
6. Set the
IDP_FIFO_GTN_INT
bit (bit 8 of the
DAI_IRPTL_RE
register)
to
HIGH
and set the corresponding bit in the
DAI_IRPTL_FE
register
to
LOW
to unmask the interrupt. Set bit 8 of the
DAI_IRPTL_PRI
reg-
ister (
IDP_FIFO_GTN_INT
) as needed to generate a high priority or
low priority core interrupt when the number of words in the FIFO
is greater than the value of
N
set in step 5.
7. Enable the PDAP by setting
IDP_PDAP_EN
(bit 31 in the
IDP_P-
DAP_CTL
register), if required.
8. Enable the IDP by setting
IDP_ENABLE
bit (bit 7 in the
IDP_CTL
register).
Do
not
set the
IDP_DMA_EN
bit (bit 5 of the
IDP_CTL
register).
Содержание ADSP-21261 SHARC
Страница 30: ...Contents xxx ADSP 2126x SHARC Processor Hardware Reference ...
Страница 40: ...Register Diagram Conventions xl ADSP 2126x SHARC Processor Hardware Reference ...
Страница 58: ...Differences From Previous SHARCs 1 18 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 112: ...Secondary Processing Element PEy 2 54 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 178: ...Summary 3 66 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 204: ...DAG Instruction Summary 4 26 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 322: ...Setting Up DMA 7 32 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 436: ...SPORT Programming Examples 9 86 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 521: ...ADSP 2126x SHARC Processor Hardware Reference 11 31 Input Data Port rts IDP_ISR end ...
Страница 522: ...Input Data Port Programming Example 11 32 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 590: ...Timer Programming Examples 14 20 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 796: ...I O Processor Registers A 174 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 800: ...B 4 ADSP 2126x SHARC Processor Core Manual ...
Страница 846: ...Index I 36 ADSP 2126x SHARC Processor Hardware Reference ...