![background image](http://html.mh-extra.com/html/analog-devices/adsp-21261-sharc/adsp-21261-sharc_hardware-reference-manual_2939675304.webp)
IOP/Core Interaction Options
7-14
ADSP-2126x SHARC Processor Hardware Reference
cannot be interrupted by a higher priority channel. For a list of DMA
channels in priority order, see
Setting Up and Starting the Chain
To set up and initiate a chain of DMA operations, use these steps:
1. Clear the chain pointer register first before enabling chaining.
2. Set up all TCBs in internal memory.
3. Write to the appropriate DMA control register, setting the DMA
enable bit to one and the chaining enable bit to one.
4. Write the address containing the index register value of the first
TCB to the chain pointer register, which starts the chain.
The I/O processor responds by autoinitializing the first DMA parameter
registers with the values from the first TCB, and then starts the first data
transfer.
Setting Up and Starting Chained DMA over the SPI
Configuring and starting chained DMA transfers over the SPI port is the
same as for the serial port, with one exception. Contrary to SPORT DMA
chaining, (where the first DMA in the chain is configured by the first
TCB), for SPI DMA chaining, the first DMA is not initialized by a TCB.
Instead, the first DMA in the chain must be loaded into the SPI parameter
registers (
IISPI
,
IMSPI
,
CSPI
), and the chain pointer register (
CPSPI
)
points to a TCB that describes the second DMA in the sequence.
Writing an address to the
CPSPI
register does not begin a chained
DMA sequence unless
IISPI
,
IMSPI
, and
CSPI
are initialized, SPI
DMA is enabled, the SPI port is enabled, and SPI DMA chaining is
enabled.
Содержание ADSP-21261 SHARC
Страница 30: ...Contents xxx ADSP 2126x SHARC Processor Hardware Reference ...
Страница 40: ...Register Diagram Conventions xl ADSP 2126x SHARC Processor Hardware Reference ...
Страница 58: ...Differences From Previous SHARCs 1 18 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 112: ...Secondary Processing Element PEy 2 54 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 178: ...Summary 3 66 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 204: ...DAG Instruction Summary 4 26 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 322: ...Setting Up DMA 7 32 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 436: ...SPORT Programming Examples 9 86 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 521: ...ADSP 2126x SHARC Processor Hardware Reference 11 31 Input Data Port rts IDP_ISR end ...
Страница 522: ...Input Data Port Programming Example 11 32 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 590: ...Timer Programming Examples 14 20 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 796: ...I O Processor Registers A 174 ADSP 2126x SHARC Processor Hardware Reference ...
Страница 800: ...B 4 ADSP 2126x SHARC Processor Core Manual ...
Страница 846: ...Index I 36 ADSP 2126x SHARC Processor Hardware Reference ...