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IP-48ADM16 HARDWARE REFERENCE MANUAL
ALPHI TECHNOLOGY CORP.
Page 18
REV 1.0
Part Number: 833-13-000-4000
Copyright
©
2007, ALPHI Technology Corporation
BUSYIN
This signal is “1” when the A/D converter is active. It is “0” after the conversion has
finished.
ACQUIRE_EN
This signal is set to “1” with the positive edge of the Start acquisition signal. It starts
the State machine. It is reset in multiple ways.
- IPRESET
signal
- Stop acquisition signal command
- End pointer DATARAM
- End SCAN block
3.3.17 Reset Interrupt Request #0
Address: I 0x22
Interrupt #0 is activated when the State Machine starts at the beginning of the
Channel List.
A write to this location will reset the interrupt request #0.
3.3.18 Direct A/D Read
Address: I 0x24
This register contains the result of the latest A/D acquisition.
3.4 RESET
The
*
is reset when the IP carrier issues a reset.