Operation
44
Serial BERT 12.5 Gb/s User Guide
Table 13. N4962A front panel – configuration adjustment controls
Text
Type
Description
Default
Adjust
->
Freq
UP and DOWN
buttons
Buttons adjust internal clock frequency by 0.01
GHz:
•
UP increases frequency (max 11.35 GHz);
•
DOWN decreases frequency (min 9.85 GHz).
Display will briefly show new frequency setting
after pressing either button, and then switches
back to previously-displayed setting.
When using an external clock (Synth = 0), the
Freq adjust range is increased to 500 MHz min,
12.5 GHz max. The N4962A frequency setting
should be set to the frequency of the external
clock so that the N4962A frequency dependent
parameters are correctly set.
10.0 GHz
Adjust
->
Ampl
UP and DOWN
buttons
Buttons adjust PRBS output amplitude by 10 mV:
•
UP increases amplitude (max 1800 mV);
•
DOWN decreases amplitude (min 300 mV).
Display will briefly show new amplitude setting
after pressing either button, and then switches
back to previously-displayed setting.
500 mV
Adjust
->
Ø
UP and DOWN
buttons
Buttons adjust BER clock phase by 2 degrees
from 5 to 12.5 GHz, and in 90-degree increments
below 5 GHz:
•
UP increases phase offset (max 358, min 0)
•
DOWN decreases phase offset
Display will briefly show new clock phase setting
after pressing either button, and then switches
back to previously-displayed setting.
0 degrees
Adjust
->
Config
State
PLUS and MINUS
buttons
Buttons adjust the value of the currently-
displayed Config State (use the
Display
->Scroll
buttons to select the current state):
•
PAT
2E31
o
options:
2E31, 2E23, 2E15, 2E10, 2E7
PAT 2E31
MS 0.500
Jitter 0
Synth 1
Err00000
ErAd OFF
Содержание N4962A
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