8250A Optical Power Meter Operation Manual
4.5 Status Register
4-14
Conditions which clear the device event status register
•
When the power is turned on.
•
When the *CLS command is executed.
•
When the *DSR? command is executed.
Conditions which clear the device event status enable register
•
When the power is turned on.
•
When the DSE0 command is executed.
Table 4-4 Device Event Status Register
bit
Name
Description
0
EOM
End Of Measure
ON: This bit is set to 1 when the measurement is complete.
OFF: This bit is set to 0 when the measurement starts.This bit is set to
0 when the measured data is read.
1
EOZ
End Of Zero
ON: This bit is set to 1 when ZERO is complete.
OFF: This bit is set to 0 when ZERO starts.
2
EOC
End Of Cal
ON: This bit is set to 1 when the calibration is complete. (XPC,
XIVC, XWR, and XSWR)
OFF: This bit is set to 0 when the calibration starts.
3
OVR
Over Range
ON: This bit is set to 1 when the measured data is above the mea-
surement range.
OFF: This bit is set to 0 when the measured data is not above the
measurement range.
4
UNR
Under Range
ON: This bit is set to 1 when the measured data is below the mea-
surement range.
OFF: This bit is set to 0 when the measured data is not below the
measurement range.
5
Not used
Fixed to 0
6
Not used
Fixed to 0
7
Not used
Fixed to 0
8
Not used
Fixed to 0
9
Not used
Fixed to 0
10
Not used
Fixed to 0
11
Not used
Fixed to 0
12
Not used
Fixed to 0
13
Not used
Fixed to 0
14
Not used
Fixed to 0
15
Not used
Fixed to 0
