MC96FR116C
130
November, 2018 Rev.1.8
11.9.4 Data format
A serial frame is defined to be one character of data bits with synchronization bits (start and stop bits),
and optionally a parity bit for error checking.
The UART supports all 30 combinations of the following as valid frame formats.
- 1 start bit
- 5, 6, 7, 8 or 9 data bits
- no, even or odd parity bit
- 1 or 2 stop bits
A frame starts with the start bit followed by the least significant data bit (LSB). Then the next data bits,
up to a total of nine, are succeeding, ending with the most significant bit (MSB). If enabled the parity
bit is inserted after the data bits, before the stop bits. A high to low transition on data pin is considered
as start bit. When a complete frame is transmitted, it can be directly followed by a new frame, or the
communication line can be set to an idle state. The idle means high state of data pin. The next figure
shows the possible combinations of the frame formats. Bits inside brackets are optional.
1 data frame consists of the following bits
•
Idle No communication on communication line (TXD/RXD)
•
St Start bit (Low)
•
Dn Data bits (0~8)
•
Parity bit ------------ Even parity, Odd parity, No parity
•
Stop bit(s) ---------- 1 bit or 2 bits
The frame format used by the UART is set by the USIZE[2:0], UPM[1:0] and USBS bits in UCTRL1
register. The Transmitter and Receiver use the same setting.
11.9.5 Parity bit
The parity bit is calculated by doing an exclusive-or of all the data bits. If odd parity is used, the result
of the exclusive-or is inverted. The parity bit is located between the MSB and first stop bit of a serial
frame.
P
even
= D
n-1
^ … ^ D
3
^ D
2
^ D
1
^ D
0
^ 0
P
odd
= D
n-1
^ … ^ D
3
^ D
2
^ D
1
^ D
0
^ 1
Figure 11-39 frame format
