MC96FR116C
182
November, 2018 Rev.1.8
FADDR15
FADDR14
FADDR13
FADDR12
FADDR11
FADDR10
FADDR9
FADDR8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00
H
FADDR[15:8]
Flash Address Middle (Write)
Checksum result in auto verify mode (Read, PCRCRD=0)
CRC result in auto verify mode (Read, PCRCRD=1)
FARL (FLASH Address Register Low)
EB
H
7
6
5
4
3
2
1
0
FADDR7
FADDR6
FADDR5
FADDR4
FADDR3
FADDR2
FADDR1
FADDR0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00
H
FADDR[7:0]
Flash Address Low. As flash page buffer size is of 64 Bytes, only
the
MSB
of this register is meaningful. (Write)
Checksum result in auto verify mode (Read, PCRCRD=0)
CRC result in auto verify mode (Read, PCRCRD=1)
FARH, FARM and FARL registers are used for program, erase, or auto-verify operation. In program or
erase mode, these registers point to the page number to be programmed or erased.
FCR (FLASH Control Register)
EC
H
7
6
5
4
3
2
1
0
-
-
EXIT1
EXIT0
CMD3
PGM /
CMD2
ERASE /
CMD1
nPBRST /
CMD0
-
-
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 01
H
EXIT[1:0]
Exit from program or erase mode. This bit is auto-cleared after 1
system clock period.
EXIT1
EXIT0
Description
0
0
No exit
0
1
No exit
1
0
No exit
1
1
Exit
CMD[3:0]
FLASH Command. The CMD0 bit(=nPBRST) is auto-set after 1
system clock period.
0000
Page Buffer Reset
0011
Erase
0101
Program
1101
LOCKF Program
others
Prohibited (no operation)
FSR (FLASH Status Register)
ED
H
7
6
5
4
3
2
1
0
nPEVBSY
VFYGOOD
PCRCRD
-
ROMINT
PMODE
EMODE
VMODE
R
R/W
R/W
-
R/W
R
R
R
Initial value : 80
H
nPEVBSY
BUSY flag. Represents that program, erase, or verify operation is on-