2. Getting Started
28
Shared Memory Control Register 1
RESET MEME
A18
A17
A16
A15
A14
A13
A13-18
D7
D6
D5
D4
D3
D2
D1
D0
Memory Enable
Reset
Register: Shared Memory Control 1
Address: Base + 00h
Access: Read/Write
0 = 8-Bit Mode
1 = 16-Bit Mode
0 = Disables External Memory Access
1 = Enables External Memory Access
A13 - A18 (D0 - D5) - This is the lower part of the address register used to determine
the position of the ZT 8995's memory within the system memory map.
MEME (D6) - Enables external memory accesses when held at logical 1. This bit
powers up as logical 0 so you must program the base memory address and set this bit
to logical 1 to enable the memory into the system's memory map.
RESET (D7) - Resets the NIC core of the AT/LANTIC controller chip on the ZT 8995.
Shared Memory Control Register 2
A19-23
8/16
MEMW
NA
LA23
LA22
LA21
LA20
LA19
D7
D6
D5
D4
D3
D2
D1
D0
Unused
Memory Width
8/16-Bit
Register: Shared Memory Control 2
Address: Base + 05h
Access: Read/Write
0 = Byte Wide External Memory Access
1 = Word Wide External Memory Access
0 = 8-Bit External Memory Access
1 = 16-Bit External Memory Access
A19 - A23 (D0 - D4) - This is the upper part of the address register used to determine
the position of the ZT 8995's memory within the system memory map.
D5 - Unused.
MEMW (D6) - This bit sets the width of external memory. When D6 is set to logical 0,
external memory is accessed as byte wide, so only 8 Kbytes of memory are available.
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