2. Getting Started
21
determine that the board is in an 8-bit STD slot. The AT/LANTIC cannot write to this
location.
57h - This location (07h) must contain 57h (ASCII 'W'). When
W17
is removed (high),
the software will read this location in the PROM Store register of the AT/LANTIC and
determine that the board is in a 16-bit STD 32 slot. The AT/LANTIC cannot write to this
location.
CHECKSUM - This location is used only in Shared RAM mode. The checksum is used
to verify the Ethernet Address and the board type. The two's compliment addition of the
last eight bytes (03h..00h) must equal FFh, otherwise there is an error. The value of the
checksum is determined from this. The AT/LANTIC cannot write to this location.
BOARD TYPE - This location is used only in Shared RAM mode. The Board Type
indicator tells the network driver what hardware is being used. The AT/LANTIC cannot
write to this location. When the board is configured to operate in WD8003EBT
compatible Shared RAM mode, the Board Type should be 05h.
ETHERNET ADDRESS - The last six bytes of the EEPROM contain the Ethernet
Address issued by the IEEE. These bytes are programmed uniquely prior to fitting the
device onto the board because the AT/LANTIC is unable to write to these locations.
Configuration Register A
Please refer to the AT/LANTIC data sheet for a detailed description of the bits in
Configuration Register A. The register contents can be changed only by an I/O read
from this location followed immediately by an I/O write to this location. The following
descriptions show the bit definitions and their default settings.
IOAD2..0
FREAD
D7
D6
D5
D4
D3
D2
D1
D0
Register: Configuration Register A
Address: Base + 0Eh
Base I/O Address
Access: Read and Write
INT2..0
MEMIO
011 Software Mode
Interrupt Line Select
Fast Read
0 = Disabled
1 = Enabled
0 = I/O Port Mode
1 = Shared RAM Mode
MEMIO Mode Select
IOAD2..0 (D2..0) - The Base I/O Address for the ZT 8995 is programmed by these three
bits. When programmed to [0 0 1], the ZT 8995 will power up in software mode and not
respond to any I/O Address. However, it will monitor the parallel port (278h) for four
consecutive writes. On the fourth write to 278h, bus data will be loaded into
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