Xilinx VCU118, User Manual

Page: 109 / 164

VCU118 Board User Guide 109
UG1224 (v1.0) December 15, 2016 www.xilinx.com
Chapter 3: Board Component Descriptions
The Maxim PMBus controller and INA226 power monitor I
2
C bus mapping is shown in
Table 3-34 .
Table 3-34: VCU118 Voltage Regulators and INA226 Power Monitors
PMBus Regulators and INA226 Map
Schematic
Page
Rail Regulator Type U#
Vout
(V)
Max
Iout
(A)
PMBus
Address
INA226
U#
I
2
C
Address
INA_PMB
US
60 VCCINT_FPGA MAX20751 U164 0.72 80 0X70 U35 0x40
62 VCC1V8_FPGA MAX15301 U9 1.80 10 0x11 U23 0X41
63 VADJ_1V8_FPGA MAX15301 U30 1.80 10 0x12 U27 0X42
64 VCCINTIO_BRAM_FPGA MAX15301 U6 0.85 10 0x15 U8 0x48
65 VCC1V2_FPGA MAX15301 U4 1.20 10 0x14 U29 0x43
66 MGTAVCC_FPGA MAX20751 U166 0.90 17 0x72 U37 0x44
67 MGTAVTT_FPGA MAX20751 U165 1.20 17 0x73 U36 0x45
69 UTIL_1V35 MAX15301 U150 1.35 10 0x1A NA NA
70 UTIL_3V3 MAX15301 U156 3.30 17 0x1B NA NA
Non-PMBus Regulators
68 MGTVCCAUX_R MAX8869EUE18 U5 1.80 1
68 MGTVCCAUX_L MAX8869EUE18 U167 1.80 1
71 SYS_2V2 MAX15027 U10 2.20 1
72 SYS_1V8 MAX15027 U125 1.80 1
72 SYS_1V0 MAX15053 U124 1.00 2
72 SYS_2V5 MAX15053 U151 2.50 2
73 DDR4_C1_VTT TPS51200DR U24 0.60 3
73 DDR4_C2_VTT TPS51200DR U134 0.60 3
74 RLD3_C3_VTERM_0V6 TPS51200DR U143 0.60 3
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