62
VC709 Evaluation Board
UG887 (v1.2.1) March 11, 2014
Chapter 1:
VC709 Evaluation Board Features
The VC709 board supports both the internal FPGA sensor measurements and the external
measurement capabilities of the XADC. Internal measurements of the die temperature,
V
CCINT
, V
CCAUX
, and V
CCBRAM
are available. The VC709 board V
CCINT
and V
CCBRAM
are
provided by a common 1.0 V supply.
Jumper J42 can be used to select either an external differential voltage reference (VREF) or
on-chip voltage reference for the analog-to-digital converter.
For external measurements an XADC header (J19) is provided. This header can be used to
provide analog inputs to the FPGA dedicated VP/VN channel, and to the
VAUXP[0]/VAUXN[0], VAUXP[8]/VAUXN[8] auxiliary analog input channels.
Simultaneous sampling of Channel 0 and Channel 8 is supported.
A user-provided analog signal multiplexer card can be used to sample additional external
analog inputs using the 4 GPIO pins available on the XADC header as multiplexer address
lines.
shows the XADC header connections (
).
Note:
.VADJ is fixed at 1.8V on the VC709 board.
X-Ref Target - Figure 1-26
Figure 1-26:
XADC Block Diagram
FPGA
U1
VAUX0N
VAUX0P
VAUX
8
N
VAUX
8
P
VREF (1.25V)
VREFN
VCCADC
GNDADC
VN
VP
DXP
DXN
UG
88
7_c1_25_01101
3
100
Ω
1 nF
100
Ω
100
Ω
1 nF
100
Ω
To
He
a
der
J19
D
ua
l U
s
e IO
(An
a
log/Digit
a
l)
100
Ω
1 nF
100
Ω
To
He
a
der
J19
100 nF
XADC_AGND
REF
3
012
U
3
5
O
u
t
In
Gnd
J42
XADC_AGND
Intern
a
l
Reference
To He
a
der J19
10
μ
F
Ferrite Be
a
d
100 nF
1 nF
Ferrite Be
a
d
J10
J9
S
t
a
r Grid
Connection
J54
XADC_VCC
XADC_AGND
GND
VREFP
VREFP
ADP12
3
U10
O
u
t
In
Gnd
XADC_AGND
1
μ
F
XADC_VCC He
a
der J49
100 nF
XADC_AGND
To J54.
3
XADC_VCC
J4
3
Ferrite Be
a
d
VCCAUX
VCC5V0
10
μ
F
AV_5V To He
a
der J19
1.
8
V 150 mV m
a
x
J5
3
Filter 5V
Su
pply
Loc
a
te Component
s
on Bo
a
rd
Clo
s
e to
P
a
ck
a
ge Pin
s
Clo
s
e to
P
a
ck
a
ge Pin
s
