Xilinx VC709, User Manual

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VC709 Evaluation Board www.xilinx.com 41
UG887 (v1.2.1) March 11, 2014
Feature Descriptions
Table 1-14 lists the SFP+ module control and status connections to the FPGA.
AN1 SFP2_TX_N 19 TX_N
AM8 SFP2_RX_P 13 RD_P
AM7 SFP2_RX_N 12 RD_N
SFP+ Module 3 (P4)
AM4 SFP3_TX_P 18 TX_P
AM3 SFP3_TX_N 19 TX_N
AL6 SFP3_RX_P 13 RD_P
AL5 SFP3_RX_N 12 RD_N
SFP+ Module 4 (P5)
AL2 SFP4_TX_P 18 TX_P
AL1 SFP4_TX_N 19 TX_N
AJ6 SFP4_RX_P 13 RD_P
AJ5 SFP4_RX_N 12 RD_N
Table 1-14: SFP+ Module Control and Status
XCVX690T (U1) Pin Net Name
SFP+ Module
Pin Number Pin Name
SFP+ Module 1 (P3)
Y38 SFP1_TX_FAULT 2 TX_FAULT
AB42 SFP1_MOD_DETECT 6 MOD_ABS
W40 SFP1_RS0 7 RS0
Y40 SFP1_RS1 9 RS1
Y39 SFP1_LOS 8 LOS
AB41 SFP1_TX_DISABLE 3 TX_DISABLE
SFP+ Module 2 (P2)
AA39 SFP2_TX_FAULT 2 TX_FAULT
AA42 SFP2_MOD_DETECT 6 MOD_ABS
AB38 SFP2_RS0 7 RS0
AB39 SFP2_RS1 9 RS1
AA40 SFP2_LOS 8 LOS
Y42 SFP2_TX_DISABLE 3 TX_DISABLE
Table 1-13: FPGA U1 to SFP+ Module Connections (Cont’d)
XCVX690T (U1) Pin Net Name
SFP+ Module
Pin Number Pin Name