Ethernet 1000BASE-X PCS/PMA or SGMII v9.1
www.xilinx.com
17
UG155 March 24, 2008
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Preface
About This Guide
The
LogiCORE™ IP Ethernet 1000BASE-X PCS/PMA or SGMII User Guide
provides
information about generating a Xilinx Ethernet 1000BASE-X PCS/PMA or SGMII core,
customizing and simulating the core using the provided example design, and running the
design files through implementation using the Xilinx tools.
Guide Contents
This guide contains the following information.
•
Preface, “About This Guide”
introduces the organization and purpose of this guide
and defines the conventions used in this document.
•
Chapter 1, “Introduction”
describes the core and related information, including
recommended design experience, additional documentation resources, technical
support, and submitting feedback to Xilinx.
•
Chapter 2, “Core Architecture”
provides an overview of the core including all
interfaces and major functional blocks.
•
Chapter 3, “Generating and Customizing the Core”
describes the Graphical User
Interface (GUI) options used to generate and customize the core.
•
Chapter 4, “Designing with the Core”
provides general guidelines for creating
designs with the core.
•
Chapter 5, “Using the Client-side GMII Data Path”
provides general guidelines for
creating designs using client side GMII of the Ethernet 1000BASE-X PCS/PMA or
SGMII core.
•
Chapter 6, “The Ten-Bit Interface”
provides general design guidelines when using the
Ten-Bit Interface (TBI) as the Physical Side of the core.
•
Chapter 7, “1000BASE-X with RocketIO Transceivers”
provides general design
guidelines when using the 1000BASE-X standard with the RocketIO™ transceiver as
the physical side of the core.
•
Chapter 8, “SGMII / Dynamic Standards Switching with RocketIO Transceivers”
provides general design guidelines when using either the SGMII standard, or the
Dynamic Switching option (between 1000BASE-X and SGMII standards). These
options always use a RocketIO as the physical interface.
•
Chapter 9, “Configuration and Status”
provides general guidelines for configuring
and monitoring the core, including a detailed description of the management registers
present in the core.
•
Chapter 10, “Auto-Negotiation”
provides guidelines for Auto-Negotiation function of
the core.
