Verdin Carrier Board Design Guide
Preliminary
– Subject to Change
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Figure 72: Evaluating the total internal resistance of the backfeeding
Using the numbers in Figure 72 as an example, we get the following total internal resistance:
𝑅
𝑖 𝑡𝑜𝑡𝑎𝑙
≈
(1.10𝑉 − 1.05𝑉) ∙ 100Ω
1.10𝑉
= 4.5Ω
The total internal resistance measured on the IO rail can then be compared to the estimated
internal resistance of the backfeeding IO pins. If the total resistance is smaller than the combined
resistance of the IO pins, there are still other backfeeding sources to be uncovered.
Comparing the results from Figure 71 and Figure 72, we see that the total internal resistance is
about three times smaller than a single signal pin. This means there are probably a total of three
(similar) signal pins that are backfeeding to this IO rail.
3.5.5
Backfeeding Prevention
There are multiple approaches for preventing backfeeding from happening. Some of them are very
cost-effective but are not applicable to all types of signals or situations. Other solutions are
expensive or require extra precious PCB real estate. Therefore, defining the right backfeeding
prevention approach is difficult. The following list of potential solutions starts from the cheap and
straightforward approaches and stretches to the complicated and expensive ones. This is not a
complete list. There are other solutions that are not discussed here. Some backfeeding
countermeasures are specific to an interface. Therefore, following the reference schematics is
advised.
Peripheral
SoC
IO Rail (off)
RX
Peripheral Rail (on)
TX
1.8V
Open: 1.10V
Close: 1.05V
High
100R
Ri = ?
