Toradex Verdin, Manual

Page: 20 / 111

Verdin Carrier Board Design Guide
Preliminary
– Subject to Change
Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com
Page | 20
2.2.2.3 PCIe x1 Device-Down Schematic Example
Device-Down means that the PCIe device is soldered directly to the carrier board. The decoupling
capacitors for the RX lanes (TX from the device) need to be placed on the carrier board. As the
capacitors for the TX lanes are located on the Verdin module, no additional capacitors should be
place on the TX lines. The reference clock lines do not need decoupling capacitors.
Figure 9: PCIe Device-Down block diagram
The schematic diagram shown below is an example of a device-down design of a gigabit Ethernet
controller. Please be aware that the TX lane from the module needs to be connected to the RX
input of the controller. The RX lane from the module needs to be connected to the TX output of the
controller. Check your device carefully to determine whether it needs this crossing or not.
Figure 10: PCIe Device-Down example schematic
PCIe
Device
(down)
PCIe
Host
M
o
du
le
C
o
nn
ec
to
r
Verdin Module Carrier Board
TX
RX
RX
TX
PCIE_RX-
PCIE_TX-
2x 100nF
2x 100nF
PCIE_1_L0_TX_P
PCIE_1_L0_TX_N
PCIE_1_L0_RX_P
PCIE_1_L0_RX_N
PCIE_1_L0_TX_P
PCIE_1_L0_TX_N
PCIE_1_L0_RX_P
PCIE_1_L0_RX_N
ETH1[0..9]
0R R4
0R R3
ETH1_SDA
ETH1_SCL
I2C1_SCL
I2C1_SDA
I210
VDD3P3_1
10
VDD3P3_2
27
VDD3P3_3
41
VDD3P3_4
51
VDD3P3_5
64
VDD1P5_1
47
VDD1P5_2
56
VDD0P9_1
11
VDD0P9_2
32
VDD0P9_3
42
VDD0P9_4
59
RSVD_22_NC
22
VDD1P5_OUT
39
VDD0P9_OUT
40
CTOP
40
CBOT
37
GND
HS
IC1B
PCIE1_RX_S_N
PCIE1_RX_S_P
PCIE1_TX_N
PCIE1_TX_P
PCIE1_CLK_N
PCIE1_CLK_P
PCIE1[0..5]
100nF
C1
100nF
C2
PCIE1_RX_N
PCIE1_RX_P
Optional
RESET_MOCI#
WAKE1_MICO#
I210
PE_RX_P
24
PE_CLK_P
26
PE_CLK_N
25
JTAG_TCK
19
JTAG_TDO
4
JTAG_TMS
18
JTAG_TDI
29
SMB_DATA
36
SMB_CLK
34
PE_TX_P
21
PE_TX_N
20
SDP0
63
XTAL_1
46
MDI_0_P
58
PE_RX_N
23
PE_RST#
17
PE_WAKE#
16
DEV_OFF#
28
LAN_PWR_GOOD
1
SMB_ALERT#
35
SDP1/PCIE_DIS
61
SDP2
62
SDP3
60
XTAL_2
45
MDI_0_N
57
MDI_1_N
54
MDI_1_P
55
MDI_2_N
52
MDI_2_P
53
MDI_3_N
49
MDI_3_P
50
NVM_CS#
15
NVM_SK
13
NVM_SI
12
NVM_SO
14
LED0
31
LED1
30
LED2
33
NC_SI_TXD0
9
NC_SI_TXD1
8
NC_SI_RXD0
6
NC_SI_RXD1
5
NC_SI_ARB_IN
43
NC_SI_ARB_OUT
44
NC_SI_CLK_IN
2
NC_SI_CRS_DV
3
NC_SI_TX_EN
7
RSET
48
IC1A
R1 10K
R2
10K
R5 10K
+V3.3_SW
R7 10K
GND
R14 10R
25.0000 MHz - 22pF -50ESR
1 2
OSC1 33pF
25V
C4 33pF
25V
C3
GND GND
R13 10K
R12 10K
R11 10K
R15 4.99K
GND
R10 10K
R9 10K
R8 10K
R6 10K
+V3.3_SW
ETH1_MDI0_N
ETH1_MDI1_P
ETH1_MDI1_N
ETH1_MDI2_P
ETH1_MDI2_N
ETH1_MDI3_P
ETH1_MDI3_N
ETH1_MDI0_P
ETH1_ACT
ETH1_LINK
10uF
C6
100nF
C7
100nF
C8
100nF
C9
100nF
C10
47uF
C5
+V3.3_SW
+V3.3_SW
+V3.3_SW
GND
10uF
C13
100nF
C14
100nF
C15
100nF
C16
100nF
C17
GND
+V1.5_LAN
10uF
C18
100nF
C19
100nF
C20
100nF
C21
100nF
C22
GND
+V0.9_LAN
100nF
C24
GND
NA
39nF
25V
C23
10uF
C12
GND
+V1.5_LAN
+V0.9_LAN
10uF
C11
GND
GND
ETH1[0..9]
PCIE1_RX_N
PCIE1_RX_P
PCIE1_TX_N
PCIE1_TX_P
PCIE1_CLK_N
PCIE1_CLK_P
PCIE_1_CLK_N
226
PCIE_1_CLK_P
228
PCIE_1_L0_RX_N
232
PCIE_1_L0_RX_P
234
PCIE_1_L0_TX_N
238
PCIE_1_L0_TX_P
240
PCIE_1_RESET#
244
X1V
2309409-2
I2C_1_SDA
12
I2C_1_SCL
14
X1M
2309409-2
CTRL_RECOVERY_MICO#
246
CTRL_PWR_BTN_MICO#
248
CTRL_FORCE_OFF_MOCI#
250
CTRL_WAKE1_MICO#
252
CTRL_PWR_EN_MOCI
254
CTRL_SLEEP_MOCI#
256
CTRL_RESET_MOCI#
258
CTRL_RESET_MICO#
260
X1W
2309409-2
GND GND GND
2
1
6
NTZD3154NT1G
T11A
3
5
4
NTZD3154NT1G
T11B
R153
100K
R155
100K
R154
10K
+V3.3_SW
100nF
16V
C102
GND
+V1.8
100nF
16V
C103
GND
FXMA2102L8X
GND
4
VCCA
1
A0
2
OE
5
A1
3
B1
6
B0
7
VCCB
8
IC19
+V3.3_SW
+V1.8 +V1.8
R161
1.8K R162
1.8K
+V3.3_SW
R159
1.8K R160
1.8K
+V1.8
+V3.3_SW
R158
4.7K
+V1.8
+V3.3_SW