SPICLK
(clock polarity=0)
SPICSn
8
SPICLK
(clock polarity=1)
SPIENAn
9
SPISOMI
SPICLK
(clock polarity = 1)
SPICLK
(clock polarity = 0)
3
2
1
5
4
7
SPISIMO Data
Must Be Valid
SPISOMI Data Is Valid
6
6
6
SPISIMO
141
TMS570LS0714
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SPNS226E – JUNE 2013 – REVISED NOVEMBER 2016
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Figure 7-24. SPI Slave Mode External Timing (CLOCK PHASE = 0)
Figure 7-25. SPI Slave Mode Enable Timing (CLOCK PHASE = 0)
