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TMS570LS0714
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SPNS226E – JUNE 2013 – REVISED NOVEMBER 2016
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TMS570LS0714
Peripheral Information and Electrical Specifications
Copyright © 2013–2016, Texas Instruments Incorporated
(1)
1 LSB = (AD
REFHI
– AD
REFLO
)/ 2
12
for 12-bit mode
(2)
1 LSB = (AD
REFHI
– AD
REFLO
)/ 2
10
for 10-bit mode
Table 7-26. MibADC Operating Characteristics Over Full Ranges of Recommended Operating
Conditions
(1) (2)
PARAMETER
DESCRIPTION/CONDITIONS
MIN NOM
MAX UNIT
CR
Conversion range over which
specified accuracy is maintained
AD
REFHI
– AD
REFLO
3
5.25
V
Z
SET
Zero Scale Offset
Difference between the first ideal transition (from
code 000h to 001h) and the actual transition
10-bit mode
1
LSB
12-bit mode
2
F
SET
Full Scale Offset
Difference between the range of the measured
code transitions (from first to last) and the range of
the ideal code transitions
10-bit mode
2
LSB
12-bit mode
3
E
DNL
Differential nonlinearity error
Difference between the actual step width and the
ideal value (see
Figure 7-13
).
10-bit mode
± 1.5
LSB
12-bit mode
± 2
E
INL
Integral nonlinearity error
Maximum deviation from the best straight line
through the MibADC. MibADC transfer
characteristics, excluding the quantization error.
10-bit mode
± 2
LSB
12-bit mode
± 2
E
TOT
Total unadjusted error
Maximum value of the difference between an
analog value and the ideal midstep value.
10-bit mode
± 2
LSB
12-bit mode
± 4
