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Low Power Mode
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Low Power Mode
The SPI module has two means to be placed in a low-power mode: a global
low-power mode from the system and a local low-power mode via the
POWERDOWN bit (SPICTRL2.2). The net effect on the SPI is the same,
independent of the source.
A low-power mode in effect shuts down all the clocks to the module. During
a global low-power mode, no registers are visible to the software; nothing can
be written to or read from any register. A local low-power mode has the same
effect when both the local POWERDOWN bit and the system level
PPWNOVR bit are set. If only the local POWERDOWN bit is set, then the SPI
logic is not clocked, but the registers continue to be clocked.
Since entering a low-power mode has the effect of suspending all state-
machine activities, care must be taken when entering such modes to insure
that a valid state is entered when low-power mode is active. As a result,
application software must insure that a low power mode is not entered during
a transmission or reception of a message.
Summary of Contents for TMS470R1 series
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