Memory Interface Control Registers
9-7
TMS320C30 and TMS320C31 External-Memory Interface
9.3
Memory Interface Control Registers
Two memory interface control registers, the primary-bus control register and
the expansion-bus control register, are described in this section.
9.3.1
Primary-Bus Control Register
The primary bus control register is a 32-bit register that contains the control bits
for the primary bus (see Figure 9–2). Table 9–3 describes the register bits with
the bit names and functions.
Figure 9–2. Primary-Bus Control Register
2
1
0
SWW
WTCNT
BNKCMP
xx
xx
3
4
5
6
7
8
9
10
11
12
15–13
31–16
HOLDST
NOHOLD
HIZ
R/W
R/W
R/W
R
R/W
R/W
Notes:
1) xx = reserved bit, read as 0
2) R = read, W = write
Note:
After changing the bit fields of the primary-bus control register, up to three
instructions are fetched before the primary bus is reconfigured because the
configuration change is performed in the execute stage of the pipeline.
