TI TVS diode array
TPD4E05U06 with easy
routing pinout
T1
U6
Clearance between signal lines
and GND and Earth/Shield
Differential length matching
and routing for signals from
transformer to RJ45
Differential length matching
and routing for signals from
PHY to transformer
To ensure shortest routing of
the signals a layer change was
done due to pinout of RJ45
J4
Design Files
79
JAJU324B – March 2015 – Revised July 2017
翻訳版
—
最新の英語版資料
http://www-s.ti.com/sc/techlit/TIDU832
Copyright © 2015–2017, Texas Instruments Incorporated
EMI/EMC
規格準拠、産業用温度範囲のデュアルポート・ギガビット・イーサネットの
リファレンス・デザイン
6.4.3
Layout for Differential Gigabit Ethernet Signals
From the PHY to the magnetics the differential pairs are routed on the top layer with differential
impedance control matching of 100
Ω
. The reference GND is on mid layer 1. This is achieved by ensuring
that isolation between top layer and mid layer 1 is smaller than the surrounding planes.
From the magnetics to the RJ45 the differential pairs A, C, and D are routed on the top layer while pair B
is routed on mid layer 2. This is due to crossing the signals on the RJ45 Ethernet jack. Again, the
differential pairs are impedance matched to 100
Ω
with reference to GND on mid layer 1. Due to the GND
being mid layer 1, there is no need for GND vias added around the B signal.
This routing achieves the minimum possible trace lengths from PHY to magnetics, magnetics to RJ45, and
here a maximum delta of the trace lengths of 1 mm between the differential pairs.
図
図
73. Layout Guidelines for PHY Differential Signals