Enable UART
access to both
DP83867 devices
Yes
Read register of
selected PHY
Select DP83867
PHY MDIO
address
Enter DP83867
PHY Register
address and data
UART
thread
No
Enter specific
register address
Write data to
DP83867 PHY
register address
Select
all addresses
0x00 to 0x1F
Print selected
register addresses
with data
No
Yes
Port 1 cable
connected?
Yes
No
Autonegotiate
Ethernet
Ethernet link
Port 1 cable
Disconnected
Yes
No
Init PHY1 and PHY2
with MDIO interface
Gigabit
Ethernet
thread
Port 2 cable
connected?
Yes
Autonegotiate
Ethernet
Ethernet link
Port 2 cable
Disconnected
No
No
Yes
Init HTTP
Init IPv4 with static IP
192.168.1.10
Init TCP and UDP
Cable
connected
Yes
No
Thread
Thread
Software Design
37
JAJU324B – March 2015 – Revised July 2017
翻訳版
—
最新の英語版資料
http://www-s.ti.com/sc/techlit/TIDU832
Copyright © 2015–2017, Texas Instruments Incorporated
EMI/EMC
規格準拠、産業用温度範囲のデュアルポート・ギガビット・イーサネットのリ
ファレンス・デザイン
The flowcharts of both threads are shown in
and
図
図
23. AM3359 Gigabit Ethernet Thread Flowchart
図
図
24. AM3359 UART Thread Flowchart
