2.0
1.8
8
0
12
20
25
SystemFrequency-MHz
Supply Voltage - V
The numbers within the fields denote the supported PMMCOREVx settings.
2.2
2.4
3.6
0, 1, 2, 3
0, 1, 2
0, 1
0
1, 2, 3
1, 2
1
2, 3
3
2
16
MSP430F5338, MSP430F5336, MSP430F5335, MSP430F5333
SLAS721D – AUGUST 2010 – REVISED DECEMBER 2015
www.ti.com
Recommended Operating Conditions (continued)
MIN
NOM
MAX
UNIT
PMMCOREVx = 0,
1.8 V
≤
V
CC
≤
3.6 V
0
8.0
(default condition)
PMMCOREVx = 1,
0
12.0
Processor frequency (maximum MCLK frequency)
(4) (5)
2 V
≤
V
CC
≤
3.6 V
f
SYSTEM
MHz
(see
Figure 5-1
)
PMMCOREVx = 2,
0
16.0
2.2 V
≤
V
CC
≤
3.6 V
PMMCOREVx = 3,
0
20.0
2.4 V
≤
V
CC
≤
3.6 V
(4)
The MSP430 CPU is clocked directly with MCLK. Both the high and low phase of MCLK must not exceed the pulse duration of the
specified maximum frequency.
(5)
Modules may have a different maximum input clock specification. See the specification of the respective module in this data sheet.
Figure 5-1. Frequency vs Supply Voltage
16
Specifications
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