MSP430F5338, MSP430F5336, MSP430F5335, MSP430F5333
www.ti.com
SLAS721D – AUGUST 2010 – REVISED DECEMBER 2015
5
Specifications
5.1
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
Voltage applied at V
CC
to V
SS
–0.3
4.1
V
Voltage applied to any pin (excluding VCORE, VBUS, V18)
(2)
–0.3
V
CC
+ 0.3
V
Diode current at any device pin
±2
mA
Maximum junction temperature, T
J
95
°C
Storage temperature, T
stg
(3)
–55
150
°C
(1)
Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating
Conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages referenced to V
SS
. VCORE is for internal device use only. No external DC loading or voltage should be applied.
(3)
Higher temperature may be applied during board soldering according to the current JEDEC J-STD-020 specification with peak reflow
temperatures not higher than classified on the device label on the shipping boxes or reels.
5.2
ESD Ratings
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±1000
V
(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-C101
(2)
±250
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as
±1000 V may actually have higher performance.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as ±250 V
may actually have higher performance.
5.3
Recommended Operating Conditions
MIN
NOM
MAX
UNIT
PMMCOREVx = 0
1.8
3.6
Supply voltage during program execution and flash
PMMCOREVx = 0, 1
2.0
3.6
V
CC
programming (AVCC1 = DVCC1 = DVCC2 = DVCC3 =
V
PMMCOREVx = 0, 1, 2
2.2
3.6
DV
CC
= V
CC
)
(1) (2)
PMMCOREVx = 0, 1, 2, 3
2.4
3.6
Supply voltage (AVSS1 = AVSS2 = AVSS3 = DVSS1 =
V
SS
0
V
DVSS2 = DVSS3 = V
SS
)
T
A
= 0°C to 85°C
1.55
3.6
V
BAT,RTC
Backup-supply voltage with RTC operational
V
T
A
= –40°C to +85°C
1.70
3.6
V
BAT,MEM
Backup-supply voltage with backup memory retained
T
A
= –40°C to +85°C
1.20
3.6
V
T
A
Operating free-air temperature
I version
–40
85
°C
T
J
Operating junction temperature
I version
–40
85
°C
C
BAK
Capacitance at pin VBAK
1
4.7
10
nF
C
VCORE
Capacitor at VCORE
(3)
470
nF
C
DVCC
/
Capacitor ratio of DVCC to VCORE
10
C
VCORE
(1)
TI recommends powering AV
CC
and DV
CC
from the same source. A maximum difference of 0.3 V between AV
CC
and DV
CC
can be
tolerated during power up and operation.
(2)
The minimum supply voltage is defined by the supervisor SVS levels when it is enabled. See the threshold parameters in
Section 5.22
for the exact values and further details.
(3)
A capacitor tolerance of ±20% or better is required.
Copyright © 2010–2015, Texas Instruments Incorporated
Specifications
15
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