EVM Dual BoC
BoC - Quick Start Guide
Revision 0.4 – preliminary
Page
4 of 31
14)
A_TCLKB & B_TCKB Source Input Clock Oscillator Enable Control – JP2
15)
Auxilluary RP1CLK Clock Input SMA Connectors – CON1/CON2
16)
Common Ground Banana Jack – BJ-MH3
17)
Board B Power Banana Jack – BJ-MH2
18)
Board A Power Banana Jack – BJ-MH1
19)
Board A & B REFCLK Source Input Clock Oscillator Enable Control – JP10
20)
Primary BoC Power Selection Switch – J6
21)
Board A AMC B+ EVM Interface Connector
22)
Board B Timer0 Output Interface Header – JP8
23)
Board B EEPROM Address Configuration Switch – J3
24)
Board A Timer0 Input Interface Header – JP7
25)
Board A & B PCIECLK Source Input Clock Oscillator Enable Control - JP3
The following illustration is of the assembled BoC card for reference purposes:
Figure 2: Front View, Assembled BoC