3.2.2.3 DAC Sequencer Timer Register DACSEQTIME (Offset 0x00C8)
Bit
Symbol
Description
Access
Reset
Value
31:16
-
Reserved
Write: don't care
Read: always reads as '0'
R
0
0:15
Sequencer Timer Preload Value
R/W
0
Table 3-16: DAC Sequencer Timer Register
Setting LOADSEL in the DAC Control Register (DACCONT) to ‘Sequencer Update’ starts the timer. The minimum
for the Sequencer Timer Preload Value is 1; the timer will not start if the Sequencer Timer Preload Value is 0.
The sequencer timer is programmable from 100μs to 6.5535s in 100μs steps. The sequencer timer is loaded with
the value in the Sequencer Timer Register when a sequence is started. In sequencer timer mode the start of the
next sequence is delayed for: Register Value * 100μs.
The time base for the sequencer timer is derived from an on board 40 MHz oscillator.
3.2.2.4 DAC Data Register DACDATA 1-8 (Offset 0x00D0 - Offset 0x00EC)
Bit
Symbol
Description
Access
Reset
Value
31:16
-
Reserved
Write: don't care
Read: always reads as '0'
R
0
0:15
DAC
DATA
1-8
DAC Data Value
When LOADSEL in the DAC Control Register is set to “00”, the DAC
output is updated immediately.
R/W
0x0000
Table 3-17: DAC Data Register
After power-on or reset the value of all DAC Data registers are set to 0x8000. The analog output voltage is
set to Midscale 0V DC.
The settling time for a full range voltage step is typically 8μs and maximum 10μs.
Description
Output Voltage
DAC Data
Value
Full Scale Range
±10V
Least Significant Bit
305.2μV
FSR - 1LSB
9.999695V
0x7FFF
Mi 1LSB
305.2μV
0x0001
Midscale
0V
0x0000
Midscale – 1LSB
-305.2μV
0xFFFF
-FSR + 1LSB
-9.999695V
0x8001
Full Scale (neg.)
-10V
0x8000
Table 3-18: DAC Data Coding
TPMC851 User Manual Issue 1.0.9
Page 26 of 65
