3.2.1.7 ADC Sequencer Timer Register ADCSEQTIME (Offset 0x0018)
Bit
Symbol
Description
Access
Reset
Value
31:16
-
Reserved
Write: don't care
Read: always reads as '0'
R
0
0:15
Sequencer Timer Preload Value
R/W
0
Table 3-11: ADC Sequencer Timer Register
The Sequencer Timer is programmable from 100μs to 6.5535s in 100μs steps. The time base for the sequencer
timer is derived from an on board 40 MHz oscillator.
Whenever the timer reaches the programmed value the sequencer starts a new sequence with the first instruction
found in the instruction RAM.
Assure that the time needed to complete a sequence is suitable to the chosen sequence timer value. If the
sequence timer elapses while a sequence is still in progress, a timer error will be asserted.
If the Sequencer Timer Register is set to ‘0’, the “Sequencer Continuous Mode” is selected. The sequencer will
start again with the first instruction of the sequence immediately after the last instruction of the previous sequence
has been completed. In this mode the Timer Error Flag (TIMER_ERROR) and the Data Overflow Error Flag
(DATA_OVERFLOW_ERROR) are not active and will read as ‘0’. The Data Available Flag (DATA_AV) will be
active, but will not produce an interrupt.
TPMC851 User Manual Issue 1.0.9
Page 21 of 65
