TABLE 3-29: COUNTER CONTROL REGISTER...........................................................................................35
TABLE 3-30: COUNTER STATUS REGISTER ..............................................................................................36
TABLE 3-31: COUNTER COMMAND REGISTER .........................................................................................37
TABLE 3-32: INTERRUPT CONTROL REGISTER ........................................................................................38
TABLE 3-33: ADC SEQUENCER DATA RAM SPACE ADDRESS MAP .......................................................39
TABLE 3-34: ADC/DAC CALIBRATION ROM DATA SPACE ADDRESS MAP.............................................40
TABLE 4-1 : PCI9030 HEADER......................................................................................................................41
TABLE 4-2 : PCI9030 PCI BASE ADDRESS USAGE ....................................................................................42
TABLE 4-3 : PCI9030 LOCAL CONFIGURATION REGISTER ......................................................................43
TABLE 4-4 : CONFIGURATION EEPROM TPMC851-10R............................................................................44
TABLE 5-1 : LOCAL BUS LITTLE/BIG ENDIAN .............................................................................................45
TABLE 6-1 : SEQUENCER ERRORS.............................................................................................................50
TABLE 6-2 : DAC LOAD MODES ...................................................................................................................55
TABLE 6-3 : INPUT MODES ...........................................................................................................................57
TABLE 6-4 : CLOCK PRESCALER.................................................................................................................57
TABLE 6-5 : COUNT DIRECTIONS................................................................................................................57
TABLE 6-6 : INPUT CONTROL MODE EVENTS ...........................................................................................59
TABLE 6-7: GATE MODE ...............................................................................................................................59
TABLE 6-8 : INTERRUPT SOURCES ............................................................................................................61
TABLE 8-1 : PIN ASSIGNMENT I/O CONNECTOR.......................................................................................64
TPMC851 User Manual Issue 1.0.9
Page 7 of 65