Tews Technologies TPMC851, User Manual

Page: 4 / 65

Table of Contents
1 PRODUCT DESCRIPTION......................................................................................... 8
2 TECHNICAL SPECIFICATION................................................................................. 10
3 LOCAL SPACE ADDRESSING................................................................................ 12
PCI9030 Local Space Configuration ...........................................................................................12 3.1
Local Register Address Space ....................................................................................................12 3.2
3.2.1 Analog Input Registers........................................................................................................14
3.2.1.1 ADC Control Register ADCCONT (Offset 0x0000) ....................................................14
3.2.1.2 ADC Data Register ADCDATA (Offset 0x0004) .........................................................16
3.2.1.3 ADC Status Register ADCSTAT (Offset 0x0008).......................................................17
3.2.1.4 ADC Conversion Start Register ADCCONV (Offset 0x000C) ....................................18
3.2.1.5 ADC Sequencer Control Register ADCSEQCONT (Offset 0x0010) ..........................19
3.2.1.6 ADC Sequencer Status Register ADCSEQSTAT (Offset 0x0014).............................20
3.2.1.7 ADC Sequencer Timer Register ADCSEQTIME (Offset 0x0018) ..............................21
3.2.1.8 ADC Sequencer Instruction RAM (Offset 0x0020 - Offset 0x009C)...........................22
3.2.2 Analog Output Registers.....................................................................................................24
3.2.2.1 DAC Control Register DACCONT (Offset 0x00C0)....................................................24
3.2.2.2 DAC Sequencer Status Register DACSEQSTAT (Offset 0x00C4) ............................25
3.2.2.3 DAC Sequencer Timer Register DACSEQTIME (Offset 0x00C8)..............................26
3.2.2.4 DAC Data Register DACDATA 1-8 (Offset 0x00D0 - Offset 0x00EC) .......................26
3.2.3 Digital I/O Registers ............................................................................................................27
3.2.3.1 Line Direction Register LINEDIR (Offset 0x0100) ......................................................27
3.2.3.2 Line Debounce Enable Register LINEDEB (Offset 0x0104).......................................28
3.2.3.3 Line Debounce Time Register LINEDBT (Offset 0x0108) ..........................................28
3.2.3.4 Line Input Register LINEIN (Offset 0x010C)...............................................................29
3.2.3.5 Line Output Register LINEOUT (Offset 0x0110) ........................................................30
3.2.3.6 Line Interrupt Enable Register LINEIEN (Offset 0x0114) ...........................................31
3.2.3.7 Line Interrupt Status Register LINEIST (Offset 0x0118) ............................................32
3.2.4 Counter Registers ...............................................................................................................33
3.2.4.1 Counter Preload Register CNTPRL (Offset 0x0120)..................................................33
3.2.4.2 Counter Compare Register CNTCMP (Offset 0x0124) ..............................................33
3.2.4.3 Counter Data Register CNTDATA (Offset 0x0128) ....................................................33
3.2.4.4 Counter Control Register CNTCONT (Offset 0x012C)...............................................34
3.2.4.5 Counter Status Register CNTSTAT (Offset 0x0130)..................................................36
3.2.4.6 Counter Command Register CNTCOM (Offset 0x0134) ............................................37
3.2.5 Interrupt Control Register ICR (Offset 0x0140) ..................................................................38
ADC Sequencer Data RAM...........................................................................................................39 3.3
ADC/DAC Calibration Data ROM .................................................................................................39 3.4
4 PCI9030 TARGET CHIP........................................................................................... 41
PCI Configuration Registers (PCR) .............................................................................................41 4.1
4.1.1 PCI9030 Header .................................................................................................................41
4.1.2 PCI Base Address Initialization...........................................................................................42
Local Configuration Register (LCR)............................................................................................43 4.2
Configuration EEPROM ................................................................................................................44 4.3
Local Software Reset....................................................................................................................44 4.4
5 CONFIGURATION HINTS ........................................................................................ 45
Big / Little Endian..........................................................................................................................45 5.1
TPMC851 User Manual Issue 1.0.9 Page 4 of 65