Tews Technologies TMPE633, User Manual

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TMPE633 User Manual Issue 1.0.3 Page 4 of 25
Table of Contents
1 PRODUCT DESCRIPTION ........................................................................................... 6
2 TECHNICAL SPECIFICATION ..................................................................................... 7
3 HANDLING AND OPERATING INSTRUCTIONS ......................................................... 8
ESD Protection ................................................................................................................................8 3.1
Height Restrictions .........................................................................................................................8 3.2
4 FUNCTIONAL DESCRIPTION...................................................................................... 9
User FPGA Overview ......................................................................................................................9 4.1
User FPGA Gigabit Transceiver (GTP)........................................................................................10 4.2
User FPGA Configuration ............................................................................................................10 4.3
4.3.1 SPI-Flash ................................................................................................................................10
4.3.2 Configuration via JTAG...........................................................................................................11
4.3.3 Generate Spartan-6 Configuration Data.................................................................................11
Clocking .........................................................................................................................................11 4.4
4.4.1 FPGA Clock Sources ..............................................................................................................11
Digital I/O Interface .......................................................................................................................12 4.5
4.5.1 TTL I/O Interface.....................................................................................................................13
4.5.2 Differential I/O Interface..........................................................................................................15
User GPIO ......................................................................................................................................15 4.6
Thermal Management ...................................................................................................................16 4.7
5 DESIGN HELP ............................................................................................................ 17
Example Design ............................................................................................................................17 5.1
FPGA MultiBoot.............................................................................................................................17 5.2
6 INSTALLATION .......................................................................................................... 17
7 I/O CONNECTORS ..................................................................................................... 18
Overview ........................................................................................................................................18 7.1
Board Connectors.........................................................................................................................19 7.2
7.2.1 System Connector (X1) ..........................................................................................................19
7.2.2 I/O Connector (X2)..................................................................................................................20
7.2.3 JTAG Connector (X3) .............................................................................................................21
8 APPENDIX A............................................................................................................... 22