Tews Technologies TMPE633, User Manual

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TMPE633 User Manual Issue 1.0.3 Page 9 of 25
4 Functional Description
This chapter gives a brief overview of the various module functions.
User FPGA Overview 4.1
The FPGA is a Spartan-6 LX25T-2 in a CSG324 package.
Spartan-6 Slices Flip-
Flops
DSP48A1
Slices
Block
RAM (Kb)
GTP
Transceivers
LX25T 3.758 30.064 32 936 2
Table 4-1 : TMPE633 FPGA Feature Overview
The FPGA is equipped with 4 I/O banks and 2 MGT (multi gigabit transceiver). One of the MGTs can be
connected to an Endpoint Block for PCI Express.
Bank V
CCO
V
REF
Signals Remarks
Bank 0 3.3V none Optional GPIO
Bank 1 3.3V none I/O Interface
Bank 2 3.3V none I/O Interface +Configuration
Bank 3 3.3V none I/O Interface
GTP Bank Description Remarks
Bank 101 MGT0: PCIe Endpoint Block
MGT1: Not used
Table 4-2 : FPGA Bank Usage
The FPGA’s VCCAUX is connected to the 3.3V supply.