MAX 10 NEEK
23
www.terasic.com
February 4, 2016
3
3
.
.
4
4
.
.
4
4
2
2
x
x
6
6
T
T
M
M
D
D
E
E
x
x
p
p
a
a
n
n
s
s
i
i
o
o
n
n
H
H
e
e
a
a
d
d
e
e
r
r
The board has one 2x6 TMD (Terasic Mini Digital) expansion header. The TMD header has 8
digital GPIO user pins connected to the MAX 10 FPGA, two 3.3V power pins and two ground pins.
There are two Transient Voltage Suppressor diode arrays used to implement ESD protection for 8
GPIO user pins..
Figure 3-17
shows the connection between the TMD header and MAX 10 FPGA.
Table 3-9
shows
the pin assignment of 2x6 TMD header.
Figure 3-17 Connections between the 2x6 TMD header and MAX 10 FPGA
Table 3-6
Pin Assignment of 2x6 TMD Header
Signal Name
FPGA Pin No.
Description
I/O Standard
GPIO[0]
PIN_Y17
GPIO Connection [0]
3.3V
GPIO[1]
PIN_AA17
GPIO Connection [1]
3.3V
GPIO[2]
PIN_V16
GPIO Connection [2]
3.3V
GPIO[3]
PIN_W15
GPIO Connection [3]
3.3V
GPIO[4]
PIN_AB16
GPIO Connection [4]
3.3V
GPIO[5]
PIN_AA16
GPIO Connection [5]
3.3V
GPIO[6]
PIN_Y16
GPIO Connection [6]
3.3V
GPIO[7]
PIN_W16
GPIO Connection [7]
3.3V
3.4.5
2
2
4
4
-
-
b
b
i
i
t
t
A
A
u
u
d
d
i
i
o
o
C
C
O
O
D
D
E
E
C
C
The MAX 10 NEEK offers high-quality 24-bit audio via the Texas Instruments TLV320AIC3254
audio CODEC (Encoder/Decoder). This chip on MAX 10 NEEK supports, line-in, line-out and
microphone-in ports with adjustable sample rate from 8kHz to 192kHz. The connection of the audio
