MAX 10 NEEK
19
www.terasic.com
February 4, 2016
Figure 3-12 Switch debouncing
There are two ten switches connected to the FPGA, as shown in
Figure 3-13
. These switches are
used as level-sensitive data inputs to a circuit. Each switch is connected directly and individually to
the FPGA. When the switch is set to the DOWN position (towards the edge of the board), it
generates a low logic level to the FPGA. When the switch is set to the UP position, a high logic
level is generated to the FPGA.
Figure 3-13 Connections between the slide switches and the MAX 10 FPGA
There are also ten user-controllable LEDs connected to the FPGA. Each LED is driven directly and
individually by the MAX 10 FPGA; driving its associated pin to a high logic level or low level to
turn the LED on or off, respectively.
Figure 3-14
shows the connections between LEDs and MAX
10 FPGA.
Table 3-3
,
Figure 3-14
and
Table 3-9
list the pin assignment of user push-buttons,
switches, and LEDs.
Pushbutton released
Pushbutton depressed
Before
Debouncing
Schmitt Trigger
Debounced
