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Theory of Operation
3–14
SPG 422 Service Manual (B034000 and above)
The clock and reset drive the counter chain. The first counter in the chain is the
horizontal counter. This 11-bit up-counter counts at 27 MHz and resets itself at
the end of the video line. It is also reset by the frame reset input, either
(BLKFRN0) or (BLKFRP0). The line length is specified by the video standard
selected. On the last count of the line, the counter issues a horizontal carry pulse.
The horizontal segment decoder is implemented in a state machine. This state
machine uses the outputs of the horizontal counter and some special timing
control signals from the horizontal counter. The horizontal segment data is used
to divide the horizontal line into a small number of unique regions. This allows
the storage of the actual signal data to be dramatically compressed.
The second counter in the chain is the vertical counter. This is a 10-bit up-count-
er that runs at 27 MHz. However, it is only enabled to count once per video line
by the horizontal carry pulse. It counts to the end of the frame in the selected
video standard and then resets itself. (It is also reset by the frame reset input.) On
the last count of the frame, the counter issues a vertical carry pulse.
The third counter in the chain is the frame counter. It is a 2-bit up-counter that
runs at 27 MHz. However, it is only enabled to count once per video frame by
the horizontal and vertical carry pulses. It counts to the end of the color frame in
the selected video standard and then resets itself. (It is also reset by the frame
reset input.)
Segment Decoder PROMs.
The counters, the horizontal segment decoder, and the
signal selection bits from the processor drive the segment decoder PROMs.
There is one PROM for NTSC, U38, and two (to get the required output bus
width) for PAL, U36 and U37. These PROMs decode the counter and decoder
inputs into pointers to unique blocks of eight samples of black burst data.
Signal Segment Data PROMs.
The signal segment data PROMs, U39 and U40
(which are time-multiplexed to double the speed), take the segment pointers
from the decoder PROMs and output the 8-bit black burst data.
DAC and Output Filter.
The DAC, U32, and output circuitry convert the digital
representation of black burst to analog, reconstruct the signal, filter it, and buffer
it to drive 75
W
.
Summary of Contents for SPG 422
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