IPC/RSL8xxx-XxxxE: user documentation
DOC/IPC_RSL8-E; V1.9
© Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com
50
/
80
4
Programming Information
4.1.
Overview
The programming of the RSL8 board is done with standard memory and I/O read and write
operations. Most configuration options are handled by the BIOS. For detailed information refer
to the NETIPC firmware documentation and other related documents as listed in paragraph 1.3.
Please contact Syslogic technical support if you need special BIOS configuration.
4.2.
Interrupt, Memory and I/O Resources
4.2.1.
Interrupt Resources
The following table shows the usage of the interrupt resources
. Interrupts marked ‘shared’ are
shared between an onboard device and an PC/104 bus interrupt line. These interrupts should
only be used for multiple interrupt sources, if all interrupt routines are able to process shared
interrupts. Interrupts marked ‘free’ are not used by onboard devices if they are not assigned to
a PCI device in the BIOS configuration. Interrupts for use on the PC/104 bus must be
configured as ‘reserved’ in CMOS setup legacy interrupt configuration and must not be used
by SIO peripherals (check SIO configuration in CMOS setup).
Interrupt
Interrupt Source
Remarks
Master
IRQ0
Timer Channel 0
IRQ1
PS/2-Controller (Keyboard)
SIO, check CMOS setup
IRQ2
Slave Interrupt Controller Cascading
IRQ3
COM2
SIO, check CMOS setup
IRQ4
COM1
SIO, check CMOS setup
IRQ5
available for PCI or COM4
SIO, check CMOS setup
IRQ6
available for PCI or PC/104 Bus IRQ6
check CMOS setup
IRQ7
available for PCI or LPT1
SIO, check CMOS setup
Slave
IRQ8
Real Time Clock
IRQ9
ACPI/PCI
do not connect
IRQ10
available for PCI or COM3
SIO, check CMOS setup
IRQ11
available for PCI or PC/104 Bus IRQ11
check CMOS setup
IRQ12
available for PCI or PS/2-Controller
SIO, check CMOS setup
IRQ13
Floating Point Unit
IRQ14
Primary IDE/SATA Channel in legacy mode
do not connect
IRQ15
available for PCI or PC/104 Bus IRQ15
check CMOS setup
Special
NMI
Watchdog and PC/104 Bus Error Interrupt IOCHCK*
shared
Tab. 33 Interrupt Usage