BIOS User's Manual
5-12
AGP SERR (Advanced Graphic Port System Error)
BX asserts this signal to indicate a AGP system error condition. The
settings for this option are
Enabled
or
Disabled
. Set to
Enabled
to
enable the AGP SERR# signal.
AGP Parity Error Response
The settings for this option are
Enabled
or
Disabled
. Set to
Enabled
to
enable the AGP (Accelerated Graphics Port) to respond to parity errors.
8bit I/O Recovery Time
This option specifies the length of a delay inserted between consecutive
8-bit I/O operations. The settings are
Disabled
,
1 SYSCLK
,
2 SYSCLKs
,
3 SYSCLKs
,
4 SYSCLKs
,
5 SYSCLKs
,
6 SYSCLKs
,
7 SYSCLKs
or
8
SYSCLKs
.
16bit I/O Recovery Time
This option specifies the length of a delay inserted between consecutive
16-bit I/O operations. The settings are
Disabled
,
1 SYSCLK
,
2
SYSCLKs
,
3 SYSCLKs
,
4 SYSCLKs
,
5 SYSCLKs
,
6 SYSCLKs
,
7
SYSCLKs
or
8 SYSCLKs
.
PIIX4 SERR#
This signal is asserted to indicate a PIIX4 System Error condition. The
settings for this option are
Enabled
or
Disabled
. The
Enabled
option
enables the SERR# signal for the Intel PIIX4 chip.
USB Passive Release
BX releases USB bus when it is idle to maximize the USB bus usage.
The settings for this option are
Enabled
or
Disabled
. Set this option to
Enabled
to enable passive release for USB.
PIIX4 Passive Release
This option functions similarly to USB Passive Release. The settings for
this option are
Enabled
or
Disabled
. Set to
Enabled
to enable passive
release for the Intel PIIX4 chip.
PIIX4 Delayed Transaction
BX is capable of PIIX4 transaction to improve PIIX4 interrupt efficiency.
The settings for this option are
Enabled
or
Disabled
. Set this option to
Enabled
to enable delayed transactions for the Intel PIIX4 chip.
Summary of Contents for SUPER P6DBE
Page 12: ...Chapter 1 Introduction 1 3 Notes...
Page 38: ...Chapter 1 Introduction 1 29...