Chapter 1: Introduction
1-7
Introduction
P3TDL3 Quick Reference
Jumpers
Description
Default Setting
JP1
SCSI Termination
Pins 1-2 (Enabled)
JBT1
CMOS Clear
(See Section 2-8)
JP2
Front Side Bus Speed
Pins 1-2 (Auto)
JP4
Manufacturer's Setting
Open
JP7
Overheat Alarm
Closed (Enabled)
JP8
LAN Enable/Disable
Open (Enabled)
JP12
3rd P/S Failure Alarm
Open (Disabled)
JP13
Speed for 64-bit PCI
Closed (33 MHz)
JP14
Watchdog Reset
Open (Disabled)
DIP Switches
Description
Default Setting
SW1 (1-4)
CPU Core/Bus Ratio
(See Section 2-7)
Connectors
Description
Chassis Fan (4 -7)
Chassis Fan Headers
COM1-2
COM1/COM2 Serial Port Connector
CPU FAN (1 & 2)
CPU1/CPU2 Fan Header
DIMM0-DIMM3
Memory (RAM) Slots
J23, J24
IDE Hard Disk Drive Connectors
J26
Floppy Disk Drive Connector
J27
Parallel Printer Port
J28
PS/2 Keyboard/Mouse
J104
Ethernet Port
JA1
Ultra160 LVD SCSI Connector
JA4
Ultra Wide SCSI Connector
JA5
50-pin Ultra SCSI Connector
JF1
Front Control Panel
JP11
Power Supply Fail Header
SLED1
SCSI LED header
Thermal Fan
Thermal Control Fan Header
U38
Universal Serial Bus Ports
U45
ATX Power Connector
USB0/1
USB 1 & 2 Ports
USB4 (J105)
Extra USB Header
WOL
Wake-on-LAN Header
WOM
Wake-on-Modem Header
Summary of Contents for SUPER P3TDL3
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