Chapter 1: Introduction
1-13
Introduction
1-2
Chipset Overview
The ServerWorks ServerSet
TM
III LE is a high-performance core logic chipset
that consists of a North Bridge and a South Bridge.
The North Bridge includes an integrated main memory subsystem and a dual
channel PCI bus that bridges the processor bus to a 64-bit PCI bus and a
32-bit PCI bus. The North Bridge also packs and unpacks data for PCI
accesses, which reserves more processor bandwidth for multiprocessor
motherboards.
The South Bridge provides various integrated functions, including the PCI to
ISA bridge and support for UDMA33, security (passwords and system pro-
tection), Plug & Play, USBs, power management, interrupt controllers and
the SMBus.
The North and South Bridges communicate over a serial bus that uses the
PCI clock as a timing reference. This serial bus uses a single pin on both
bridges to send a 4-bit word for transmitting commands back and forth.
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Special Features
BIOS Recovery
The BIOS Recovery function allows you to use an image file to recover your
BIOS if the BIOS flashing procedure fails (see Section 3-3).
Recovery from AC Power Loss
BIOS provides a setting for you to determine how the system will respond
when AC power is lost and then restored to the system. You can choose
for the system to remain powered off (in which case you must hit the
power switch to turn it back on) or for it to automatically return to a power
on state. See the Power Lost Control setting in the BIOS chapter of this
manual to change this setting. The default setting is Always OFF.
Summary of Contents for SUPER P3TDL3
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