Stanford Research Systems SR865A, Operation Manual

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Performance Test Record 197
SR865A DSP Lock-in Amplifier
SR865A Performance Test Record
Serial Number _____________________ Tested By __________________________
Firmware Revision _________________ Date ______________________________
Equipment Used __________________________________________________
__________________________________________________
__________________________________________________
__________________________________________________
__________________________________________________
dc Offset
Input Coupling Reading Upper Limit
AC _______ 0.500 mV
DC _______ 0.500 mV
Common Mode Rejection
Frequency Reading Upper Limit
1 kHz _______ 30 µV
Sine Output Amplitude and Flatness
Sine Output Ampl. Lower Limit Reading Upper Limit
1.00 V 0.490 V (
A
)_______ 0.5100 V
300 mV 147.0 mV (
B
)_______ 153.0 mV
100 mV 49.0 mV (
C
)_______ 51.0 mV
30 mV 14.70 mV (
D
)_______ 15.30 mV
10.0 mV 4.98 mV (
E
)_______ 5.10 mV
1.00 mV 0.490 mV (
F
)_______ 0.510 mV
Sine Ampl. Frequency Lower Limit Reading Upper Limit
100 mV 10 kHz 49.0 mV (
G
)_______ 51.0 mV
100 kHz 49.0 mV (
H
)_______ 51.0 mV
1.0 MHz 49.0 mV (
J
)_______ 51.0 mV
Note the readings recorded as (
A
) through (
J
) will be used to determine lower and upper limits for the
Amplitude Accuracy and Flatness, and Amplitude Linearity, both of which are on the next page.
Test Record sheet 1 of 4