5-6
Pin Name
VDDQ
VSSQ
A11
A12
VDDQ
VSSQ
A13
A14
A15
A18
WE3/DQM3/ICIOWR
WE2/DQM2/ICIORD
VDD
VSS
CS3
RAS
A16
A19
D23
D24
VDDQ
VSSQ
D22
D25
D21
D26
D27
D19
D18
D29
VSSQ
D30
D17
VDDQ
D31
D16
D28
D20
NF/AUDATA[1]/PA2
NF/AUDATA[0]/PA5
A23
A22
NF/AUDATA[3]/PA3
NF/AUDATA[2]/PA6
A25
A24
NF/AUDSYNC/PA4
NF/AUDCK/PA7
VDD
VSS
/O
-
-
I
I
-
-
I
I
I
I
O
O
-
-
O
O
I
I
O/I
O/I
-
-
O/I
O/I
O/I
O/I
O/I
O/I
O/I
O/I
-
O/I
O/I
-
O/I
O/I
O/I
O/I
O/I
O/I
I
I
O/I
O/I
I
I
I
O
-
-
Function
IO VDD ( SH-SW3.3V )
IO GND
Address (SHHA)
Address (SHHA)
IO VDD ( SH-SW3.3V )
IO GND
Address (SHHA)
Address (SHHA)
Address (SHHA)
Address (SHHA)
D31-D24 select signal
D23-D16 select signal
VDD ( SH-SW1.5VA )
GND
Chip select 3
RAS signal
Address (SHHA)
Address (SHHA)
Data (SHHD)
Data (SHHD)
IO VDD ( SH-SW3.3V )
IO GND
Data (SHHD)
Data (SHHD)
Data (SHHD)
Data (SHHD)
Data (SHHD)
Data (SHHD)
Data (SHHD)
Data (SHHD)
IO GND
Data (SHHD)
Data (SHHD)
IO VDD ( SH-SW3.3V )
Data (SHHD)
Data (SHHD)
Data (SHHD)
Data (SHHD)
Audio data /Port
Audio data /Port
Address (SHHA)
Address (SHHA)
Audio data /Port
Audio data /Port
Address (SHHA)
Address (SHHA)
Audio sync/Port
Audio clock/Port
VDD ( SH-SW1.5VA )
GND
Pin No.
V11
U11
Y12
W12
V12
U12
Y13
W13
V13
U13
Y14
W14
V14
U14
Y15
W15
V15
U15
Y16
W16
V16
U16
Y17
W17
V17
Y18
W18
Y19
Y20
W20
W19
V20
V19
V18
U20
U19
U18
U17
T20
T19
T18
T17
R20
R19
R18
R17
P20
P19
P18
P17
Summary of Contents for RDR-GXD310
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