Sony Ipels PCS-G50, Service Manual

Page: 30 / 200

PCS-G50/G50P
3-4
System diagram of clocks in PCS-PG50/PG50P: Fig. 3-2
IC101
Memor
y Stic
k
P
o
w
er Controller
X301/CPU
60 MHz
X1001/CPU
32.768 KHz
X401/CPU
4 MHz
X101/CPU
20 MHz
IC102/CPU
X2101/CPU
12 MHz
X502/CPU
40 MHz
IC403 uCom
IC801
DSP (MCU)
IC1401
FPGA (Video Matr
ix)
IC1006
RT
C
IC1203
AD/D
A
IC1202
IC1001
FPGA
(A
udio)
IC2103
LVDS Receiv
e
r
IC2101
LVDS T
ransmitter
IC2001
IC401
Selecter
IC2203, 2204, 2207, 2208 B
US Switch
IC2201, 2202, 2205, 2206 Bus Buff
er
(8M
x
16-bit = 16 MB)
(8M
x
16-bit = 16 MB)
(256K
x
8-bit = 2 MB)
(2M
x
32-bit = 8 MB)
(2M
x
32-bit = 8 MB)
(16M
x
16-bit = 32 MB)
IC302
C-PLD
(System P
o
rt
)
IC2301-2307
Bus Buff
e
r
IC2209-2216
Bus Buff
e
r
DSP
CPU
IC503
(CY2305)
CPU
CPU
CPU
CPU
IC1006
RT
C
(RS5C732A)
CPU
CPU
CPU
CPU
CPU
CPU
PS
CPU
CPUDSP
CPU
IC101
CPU
CPU
CPU
CPU CPU
CPU
CPU
CPU
DSP
IC405
DOC
Analog Sel.
IC901-904
SDRAM
(2M
x
32-bit = 8 MB)
IC1403
SDRAM
IC202, 204,
206, 208
SDRAM
IC501
DSP (DEC)
(8M
x
16-bit = 16 MB)
DSP
DSP
IC601
Gr
aphics
, etc
CPU
IC801
VO
A
CPU
CPU
IC1651
DSP (MCU)
(8M
x
16-bit = 16 MB)
CPU CPU
DSP
DSP
IC601-604
SDRAM
IC201
DSP (ENC)
(8M
x
16-bit = 16 MB)
(2M
x
32-bit = 32 MB)
DSP
DSP
IC301-304
SDRAM
IC1901
LAN Controller
LAN Controller
T1901
CPU
T
rans
IC1701-1704
SDRAM
Line Dr
iv
er/Receiv
e
r
IC2105
DSP (A
udio)
IC1101,1102
IC602,603
SDRAM
(1M
x
16-bit = 2 MB)
IC1301
Displa
y
Processor
CPU
IC1401.1402
SDRAM
IC802
SDRAM
IC1005
Flash (SPI)
IC2102
USB Controller
IC201,203
Flash Memor
y
CPU
IC209
SRAM
IC504
Memor
y Stic
k
Controller
IC402 C-PLD
(Bus Ctr
l)
PS
IC202
Ther
mostat
IC2106
Po
w
e
r
Ctr
l.
IC1101,1102
SIO
CPU
IC702
C-PLD
(Video Sync)
CPU
CPUCPU
IC1501,1504
Video Encoder
CPU
IC1502,1505
Analog Sel.
DSP
IC1501-1504,
1506
Video Encoder
IC2101,2201
VIA
IC2102,2202
SDRAM
DSP
DSP
IC1904,1905
Noise Reduction
DSP
IC1902,1903
Video Decoder
DSP
DSP
IC1706
Analog Sel.
Sync Detecter
IC1703 IC1704,1705
Analog Sel.
CPU
IC1503,1506
AMP
CPU
IC1509
AMP
CPU
CKIODIV2_CPLDB
US
SH_CKIO
CKIODIV2_CPLDB
US
4
SH_CKIO_SDRAM1-4
25M_ETHER
PCICLK_82551_2
PCICLK_82551_1
25M_ETHER2
25M_ECHOCAN1 25M_ECHOCAN2
CPU
(SN74L
VC244)
IC103
EXT
AL2
PCICLK_SH
X1651/CPU
50 MHz
OSC
27M_TMUX
IC1653
(ICS511)
CPU
AECLKIN
125 MHz
25M_TMUX
27M_NZ
27M_V
O
A
27M_AFP
27M_VFP
CPSD_SGCK
PCICLK_CP
27M_CP
24.576M_CP
X1301/CPU
24.576 MHz
UNB
UF
24.576M_FPGA
27M_VS
27M_VE1
27M_VE21
27M_VE23
27M_VE22
SDCLK
2
54M
27M_VIA2 27M_VIA1
X1901/DSP
24.576 MHz
X1101, 1102/DSP
3.6864 MHz
UNB
UF
24.576M_VD1
24.576M _VD2
RCLK
2
: CPU-382 : DSP-113
CPU
DSP
: PS-686
PS
X501/CPU
25 MHz
OSC
IC501
SS CLK Gen. CPU
CPU
IC502
CLK Driv er
(IMISM560BZD)
(IDT49FCT3805PY)
(IDT49FCT3805PY)
X503/CPU
33 MHz
OSC
CPU
IC505
CLK Driv er
25M_ECHOCAN1 25M_ECHOCAN2 25M_ETHER 25M_TMUX PCICLK_CP PCICLK_82551_2 PCICLK_82551_1 PCICLK_SH
(IDT49FCT3805PY)
(TC74VCX2125FT)
(TC7SZ125FU)
CPU
IC506
CLK Driv er
(IDT49FCT3805PY)
DSP
IC105
CLK Driv er
X101/DSP
54 MHz
OSC
DSP
IC102
Flip-Flop
(TC74LCX74FT)
DSP
IC103
Buffe r
DSP
IC101
Buffe r
27M_VE1
27M_VIA2 27M_VIA1 27M_VE21 27M_VE22 27M_TMCU 27M_TDEC 27M_TMCU 27M_VFP
27M_CP 27M_NZ 27M_MP4 27M_V
O
A
27M_TMUX 27M_AFP
27M_VE23
27M_VS
54M 27M_CPU
27M/CPU-382:
8 (8 de
vices)
27M/DSP-113:
9 (14 de
vices)
X201/DSP
50 MHz
OSC
DSP
IC205
Flip-Flop
(TC74LCX74FT)
IC206
SS CLK Gen.
DSP
(IMISM560BZD)
0
(IDT49FCT3805PY)
DSP
IC208
Buffe r
IC802
DSP
(ICS511)
IC502
DSP
(ICS511)
IC210
DSP
(ICS511)
0
OSC
0
OSC
0
0
OSC
AECLKIN
125 MHz
CLKIN
50 MHz
AECLKIN
125 MHz
CLKIN
50 MHz
AECLKIN
125 MHz
CLKIN
50 MHz
27M_TMCU
27M_TDEC
27M_TENC
: The po
w
e
r is supplied to these de
vices at standb
y.