SMAR HI302, User Manual

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HI302 – User’s Manual
6.5
H1 Fieldbus Communication
The Fieldbus communication is done through the FB3050, that access directly the
memory via DMA and shares the 10 MHz clock generated by the HC11 (U1). The analog
interface is done through the Media Access Unit (MAU). This is a passive interface, i.e., it
is not fed by the net, with capacitive discoupling and galvanic isolation. It is protected
against electrostatic discharges and voltage surges. All circuits are fed with +5VD, and
some operational use the 2V5 reference.
The communication is indicated by a LED fed by the (U10) EPLD, as the LED blinks at
every message transmitted.
HART Communication
The HI302 modules have 8 channels for HART master communication, with capacitive
and galvanic isolation (TF3). All channels also are protected against ESD (D14) and
surges (Z2, Z3 and Z5). The initial stage on each receptor is a low pass filter (U23A)
centralized in approximately 1700 Hz, as the range of HART communication frequencies
is from 1200 to 2200 Hz (fundamentals). Next, a comparator (U27A) changes the signal
received and amplified in a square wave, for it to be decodified by the Smar HT2012
HART modem (U35). The transmission is made by switching a 22uF electrolytic capacitor
that works integrating the signal modulated by the HT2012.
Every HART channel has a LED (L1), controlled by the UART, indicating the several
statuses of the channel’s work. Two quadruple UARTs (U7 and U8) totaling 8 independent
UARTs concentrate the 8-channel communication.
These UARTs generate a signal of 14.7456 MHz (Y2) used by them and by a divisor on
the EPLD (U10), that generates the clock for the modems, 460,80 KHz strong.
4-20mA To Foundation Fieldbus Analog Conversion (HI302-I)
The HI302-I model has an additional circuit (GLL1205 backup board) that converts the
transmitter’s analog signal by means of a signal conditioning circuit and a low pass filter
with a cut frequency of approximately 10Hz (U9A), an AD converter (U7) and a referential
voltage source of 4V096 (U8). These circuits are protected against high voltage by zener
diodes, against overheating and inverted polarity. This backup plate is connected by the
CN2 and allows the module to indicate the current’s measured value by a MAI (or AI)
block, to be utilized on any control mesh. All circuits forming the analog acquisition are
isolated from the others by a DC-DEC (U1) converter and by (U3, U4...) optical couplers.
The reading update is approximately each 100 ms.