OfficeServ 500 Wireless LAN Service Manual/Ed.00
CHAPTER 3. Installation
© SAMSUNG Electronics Co., Ltd.
Page 1-9
Main Processor
The main CPU used in the 8WLI is Motorola’s MC68000/MC68008 core series,
which enhanced the communication function.
The major specification of CPU is as follows :
Supports the interrupt mode(Normal/Dedicated mode)
Supports On-Chip 1152 byte Dual Port RAM
Supports 3 timers
Supports the selection of 4 programmable chips
Supports 3 SCCs(Serial Communication Controllers)
Supports various protocols
Supports various physical interfaces
The CPU is the central control part that leads the performance of programs in the
board, and basically controls the memory and main components for performing the
program. The clock used for the program performance is the oscillator with
16.384MHz frequency, and transmits/receives 16bits data operating with the memory.
The interrupts are handled using the dedicated modes, and their uses are described in
the table below.
Table 1.1 Interrupt Information on 8WLI CPU
Level()
Name
Remarks
NMI(7) ABORT For
debugger
INT(6) DASL
INT
16×DASL
INT(4) DMC
RX0
PB11(4×DASL)
INT(4) DMC
RX1
PB10(4×DASL)
INT(4) 10m
sec
TIMMER1
INT(4) SIO SCC3
INT(4) INT
TX0
PB9(4×DASL)
INT(4) INT
TX1
PB8(4×DASL)
INT(1)
Since several interrupts data are
multiplexed onto level4, the processing of
DMC RX and TX interrupts may get
affected.
To prevent this, 10ms interrupt is lowered
to level3 by S/W while performed routinely.
So, even during the 10m sec interrupt
performance, the DMC UART interrupt can
be processed.
Flash Memory
The OfficeServ 500
System uses the flash memory of 512Kword capacity.
The AM29F800B of AMD is used, and this operates with the CPU on the 16 bits
mode for transmitting/receiving data.
In the flash memory, the programs for the 8WLI to perform the relevant functions,
including a booting program, are saved. When the program is changed, the program
can be upgraded using SIO(Serial Input Output) through the UART.
