RK3288 Hardware Design Guide
22 2G/3G/4G
22.1 Schematic
PIN APIO5_VDD is the power domain for GPIO, in actual product design, IO power is
supplied based on 4G module, make sure GPIO level can match 4G module as shown in Fig
22-1, 22-2.
Fig 22-1
Fig 22-2
Reserve ESD component for USIM socket, to avoid module damage caused by plugging,
as shown in Fig 22-3.
Summary of Contents for RK32 Series
Page 1: ...RK3288 Hardware Design Guide RK3288 Hardware Design Guide Revision 1 2 Jun 18 2014...
Page 2: ...RK3288 Hardware Design Guide Revision History Date Revision Description 2014 12 15 1 2...
Page 22: ...RK3288 Hardware Design Guide Fig 4 3 Fig 4 4...
Page 23: ...RK3288 Hardware Design Guide Fig 4 5...
Page 39: ...RK3288 Hardware Design Guide Fig 5 30...
Page 56: ...RK3288 Hardware Design Guide Fig 9 7 Fig 9 8...
Page 62: ...RK3288 Hardware Design Guide Fig 11 7...
Page 69: ...RK3288 Hardware Design Guide Fig 14 2 Fig 14 3...
Page 79: ...RK3288 Hardware Design Guide...
Page 102: ...RK3288 Hardware Design Guide Fig 22 7...
Page 109: ...RK3288 Hardware Design Guide Fig 23 13 Fig 23 14...
