Renesas M3A-HS64, User Manual

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M3A-HS64 Functions
2.2.4 SH7264 Multiplex Pins Used on the M3A-HS64
Rev. 1.00 Apr 30, 2009
2-11
REJ11J0034-0100
2
Table 2.2.12 SH7264 Multiplex Pin Functions (FLCTL)
SH7264 Port Control Register Peripheral
Function
Pin Name
Register Name MD bit Setting
SH7264
Multiplex Pin Name
FLCTL NAF7 PDCR3 PD15MD[1:0] = B'01 PD15/ D15/NAF7 /PWM2H
NAF6 PDCR3 PD14MD[1:0] = B'01 PD14/ D14/NAF6 /PWM2G
NAF5 PDCR3 PD13MD[1:0] = B'01 PD13/ D13/NAF5 /PWM2F
NAF4 PDCR3 PD12MD[1:0] = B'01 PD12/ D12/NAF4 /PWM2E
NAF3 PDCR2 PD11MD[1:0] = B'01 PD11/ D11/NAF3 /PWM2D
NAF2 PDCR2 PD10MD[1:0] = B'01 PD10/ D10/NAF2 /PWM2C
NAF1 PDCR2 PD9MD[1:0] = B'01 PD9/ D9/NAF1 /PWM2B
NAF0 PDCR2 PD8MD[1:0] = B'01 PD8/ D8/NAF0 /PWM2A
FWE# PDCR1 PD7MD[1:0] = B'01 PD7/ D7/FWE# /PWM1H
FALE PDCR1 PD6MD[1:0] = B'01 PD6/ D6/FALE /PWM1G
FCLE PDCR1 PD5MD[1:0] = B'01 PD5/ D5/FCLE /PWM1F
FRE# PDCR1 PD4MD[1:0] = B'01 PD4/ D4/FRE# /PWM1E
FCE# PFCR2 PF10MD[2:0] = B'101 PF10/A24/SSIWS3/SSL00/TIOC3B/ FCE#
FRB PFCR2 PF9MD[2:0] = B'101 PF9/A23/SSISCK3/RSPCK0/TIOC3A/ FRB
Table 2.2.13 SH7264 Multiplex Pin Functions (RSPI)
SH7264 Port Control Register Peripheral
Function
Pin Name
Register Name MD bit Setting
SH7264
Multiplex Pin Name
RSPI MISO0 PFCR3 PF12MD[2:0] = B'011 PF12/BS#/ MISO0 /TIOC3D/SPDIF_OUT
MOSI0 PFCR2 PF11MD[2:0] = B'011 PF11/A25/SSIDATA3/ MOSI0 /TIOC3C/SPDIF_IN
SSL00 PFCR2 PF10MD[2:0] = B'011 PF10/A24/SSIWS3/ SSL00 /TIOC3B/FCE#
RSPCK0 PFCR2 PF9MD[2:0] = B'011 PF9/A23/SSISCK3/ RSPCK0 /TIOC3A/FRB
Table 2.2.14 SH7264 Multiplex Pin Functions (PORT)
SH7264 Port Control Register Peripheral
Function
Pin Name
Register Name MD bit Setting
SH7264
Multiplex Pin Name
PORT PB22 PBCR5 PB22MD[1:0] = B'00 PB22 /A22/CS4#