CHAPTER 3 REGISTERS
User’s Manual S19262EJ3V0UM
23
3.2.6 Modem control register
This register (MCR: 5000_0014H (UART0), 5001_0014H (UART1), 5002_0014H (UART2)) controls the interface
with modems (and other peripheral devices).
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
Reserved AFE
Reserved
OUT2
OUT1
RTS
DTR
Name R/W
Bit
After
Reset
Function
Reserved
R
15:8
0
Reserved. When these bits are read, 0 is returned for each bit.
Reserved
R
7:6
0
Reserved. Written data is ignored.
AFE *
R/W
5
0
Specifies whether to enable auto-flow control (auto-CTS and auto-
RTS).
0: Disables auto-flow control.
1: Enables auto-flow control.
Auto-flow operation is controlled in detail by using bit 1 of this register
and bit 6 of the HCR0 register.
Reserved
R/W
4
0
Reserved.
OUT2
R/W
3
0
Selects the level of the general-purpose output OUT2Z (internal
signal).
0: High (inactive).
1: Low (active)
In local loopback mode, this bit controls DCDZ (internal signal) input.
OUT1
R/W
2
0
Selects the level of the general-purpose output OUT1Z (internal
signal).
0: High (inactive)
1: Low (active)
In local loopback mode, this bit controls RIZ (internal signal) input.
RTS
R/W
1
0
Selects the level of UARTx_RTSB pin output (transmission request)
when auto-RTS is not used (bit 5 = 0).
0: High (inactive)
1: Low (active)
In local loopback mode, this bit controls the UARTx_CTSB input pin.
DTR
R/W
0
0
Selects the level of DTRZ (communication link establishment ready,
internal signal) output.
0: High (inactive)
1: Low (active)
In local loopback mode, this bit controls DSRZ (internal signal) input.
* If a register value is changed during operation, normal operation is not guaranteed. In this case, initialize the
register.
