Renesas EMMA Mobile 1, User Manual

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User’s Manual S19262EJ3V0UM
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CHAPTER 3 REGISTERS
UART register addresses use half-word boundaries.
3.1 Registers
The offset addresses 0000H to 0034H are assigned to UART registers, and 0040H to 0050H are assigned to IR
encoder/decoder registers.
Do not access reserved registers. The value 0000_0000H is returned for a read access.
Do not write any value other than 0 to the reserved bits in each register.
Base addresses: 5000_0000H (UART0), 5001_0000H (UART1), 5002_0000H (UART2)
Address Register Name Register Symbol R/W After Reset
Receive buffer register RBR R 0000H
Transmit hold register THR W
Undefined
0004H Interrupt enable register IER R/W 0000H
0008H Interrupt identification register IIR R 0001H
000CH FIFO control register FCR R/W 0000H
0010H Line control register LCR R/W 0000H
0014H Modem control register MCR R/W 0000H
0018H Line status register LSR R 0060H
001CH Modem status register MSR R 00xxH
Note 1
0020H Scratch register SCR R/W 0000H
0024H Divisor latch LS byte register DLL R/W
Note 2
0000H
0028H Divisor latch MS byte register DLM R/W
Note 2
0000H
002CH Hardware control register HCR0 R/W 0000H
0030H Hardware status register 2 HCR2 R 0000H
0034H Hardware status register 3 HCR3 R 0000H
0038H Reserved
  
003CH Reserved
  
0040H IR control register 0 IRCR0 R/W 0000H
0044H IR control register 1 IRCR1 R/W 0002H
0048H IR control register 2 IRCR2 R/W 0000H
004CH IR control register 3 IRCR3 R/W 0000H
0050H IR control register 4 IRCR4 R/W 0000H
Notes 1. Differs depending on the condition of the connected device.
2. Bit 7 (DLAB) of the LCR register must be set to 1 before setting up the DLL and DLM registers. The DLAB
bit must be set to 0 after writing to the DLL and DLM registers. For details, see 3.2.5 Line control
register .