RDC R8810LV, User Manual

Page: 83 / 93

RDC
®
RISC DSP Controller
R8810LV
RDC Semiconductor Co.
Rev:1.2
Subject to change without notice
83
No. Description MIN MAX Unit
1 CLKOUTA high to A Address Valid 0 15 ns
2
A address valid to
RD
low
1.5T-12 ns
3 S6 active delay 0 20 ns
4 S6 inactive delay 0 20 ns
5 AD address Valid Delay 0 20 ns
6 Address Hold 0 12 ns
7 Data in setup 10 ns
8 Data in Hold 3 ns
9 ALE active delay 0 20 ns
10 ALE inactive delay 0 20 ns
11 Address Valid after ALE inactive 1/2T-10 ns
12 ALE width T-10 ns
13
RD
active delay
0 15 ns
14
RD
Pulse Width
2T-15 ns
15
RD
inactive delay
0 20 ns
16
CLKOUTA HIGH to LCS UCS valid
0 20 ns
17 UCS,LCS inactive delay 0 20 ns
18
PCS , MCS active delay
0 20 ns
19
PCS , MCS inactive delay
0 20 ns
20
DEN active delay
0 20 ns
21
DEN inactive delay
0 20 ns
22 DTR active delay 0 20 ns
23 DTR inactive delay 0 20 ns
24 Status active delay 0 20 ns
25 Status inactive delay 0 20 ns
26
UZI active delay
0 20 ns
27
UZI inactive delay
0 20 ns
1. T means a clock period time
2. All timing parameters are measured at 1.5V with 50 PF loading on CLKOUTA
. All output test conditions are with CL=50 pF